aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-shmobile
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2012-09-14 16:08:08 -0400
committerArnd Bergmann <arnd@arndb.de>2012-09-18 04:15:11 -0400
commit0a4b04dc299dfb691827a4001b3d8d7e443b71c9 (patch)
tree8f8aaabd715306eac4a814cdfd73ef9059f16fea /arch/arm/mach-shmobile
parent4cbe5a555fa58a79b6ecbb6c531b8bab0650778d (diff)
ARM: shmobile: use __iomem pointers for MMIO
ARM is moving to stricter checks on readl/write functions, so we need to use the correct types everywhere. This patch is a bit ugly for shmobile, which is the only platform that just uses integer literals all over the place, but I can't see a better way to do this. Acked-by: Simon Horman <horms@verge.net.au> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: linux-sh@vger.kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c12
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c6
-rw-r--r--arch/arm/mach-shmobile/board-bonito.c8
-rw-r--r--arch/arm/mach-shmobile/board-g3evm.c12
-rw-r--r--arch/arm/mach-shmobile/board-g4evm.c30
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c8
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c22
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7740.c46
-rw-r--r--arch/arm/mach-shmobile/clock-sh7367.c44
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c60
-rw-r--r--arch/arm/mach-shmobile/clock-sh7377.c50
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c70
-rw-r--r--arch/arm/mach-shmobile/include/mach/gpio.h6
-rw-r--r--arch/arm/mach-shmobile/intc-r8a7779.c14
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c27
-rw-r--r--arch/arm/mach-shmobile/intc-sh73a0.c20
-rw-r--r--arch/arm/mach-shmobile/pm-rmobile.c6
-rw-r--r--arch/arm/mach-shmobile/pm-sh7372.c57
-rw-r--r--arch/arm/mach-shmobile/setup-sh7367.c2
-rw-r--r--arch/arm/mach-shmobile/setup-sh7377.c2
-rw-r--r--arch/arm/mach-shmobile/setup-sh73a0.c2
21 files changed, 255 insertions, 249 deletions
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index f172ca85905c..1089ee5472eb 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -432,7 +432,7 @@ static void usb1_host_port_power(int port, int power)
432 return; 432 return;
433 433
434 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */ 434 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
435 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008); 435 __raw_writew(__raw_readw(IOMEM(0xE68B0008)) | 0x600, IOMEM(0xE68B0008));
436} 436}
437 437
438static struct r8a66597_platdata usb1_host_data = { 438static struct r8a66597_platdata usb1_host_data = {
@@ -1224,9 +1224,9 @@ static struct i2c_board_info i2c1_devices[] = {
1224}; 1224};
1225 1225
1226 1226
1227#define GPIO_PORT9CR 0xE6051009 1227#define GPIO_PORT9CR IOMEM(0xE6051009)
1228#define GPIO_PORT10CR 0xE605100A 1228#define GPIO_PORT10CR IOMEM(0xE605100A)
1229#define USCCR1 0xE6058144 1229#define USCCR1 IOMEM(0xE6058144)
1230static void __init ap4evb_init(void) 1230static void __init ap4evb_init(void)
1231{ 1231{
1232 u32 srcr4; 1232 u32 srcr4;
@@ -1304,7 +1304,7 @@ static void __init ap4evb_init(void)
1304 gpio_request(GPIO_FN_OVCN2_1, NULL); 1304 gpio_request(GPIO_FN_OVCN2_1, NULL);
1305 1305
1306 /* setup USB phy */ 1306 /* setup USB phy */
1307 __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */ 1307 __raw_writew(0x8a0a, IOMEM(0xE6058130)); /* USBCR4 */
1308 1308
1309 /* enable FSI2 port A (ak4643) */ 1309 /* enable FSI2 port A (ak4643) */
1310 gpio_request(GPIO_FN_FSIAIBT, NULL); 1310 gpio_request(GPIO_FN_FSIAIBT, NULL);
@@ -1453,7 +1453,7 @@ static void __init ap4evb_init(void)
1453 gpio_request(GPIO_FN_HDMI_CEC, NULL); 1453 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1454 1454
1455 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */ 1455 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1456#define SRCR4 0xe61580bc 1456#define SRCR4 IOMEM(0xe61580bc)
1457 srcr4 = __raw_readl(SRCR4); 1457 srcr4 = __raw_readl(SRCR4);
1458 __raw_writel(srcr4 | (1 << 13), SRCR4); 1458 __raw_writel(srcr4 | (1 << 13), SRCR4);
1459 udelay(50); 1459 udelay(50);
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index cf10f92856dc..2f32aa64c2b1 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -135,7 +135,7 @@
135 * usbhsf_power_ctrl() 135 * usbhsf_power_ctrl()
136 */ 136 */
137#define IRQ7 evt2irq(0x02e0) 137#define IRQ7 evt2irq(0x02e0)
138#define USBCR1 0xe605810a 138#define USBCR1 IOMEM(0xe605810a)
139#define USBH 0xC6700000 139#define USBH 0xC6700000
140#define USBH_USBCTR 0x10834 140#define USBH_USBCTR 0x10834
141 141
@@ -949,8 +949,8 @@ clock_error:
949/* 949/*
950 * board init 950 * board init
951 */ 951 */
952#define GPIO_PORT7CR 0xe6050007 952#define GPIO_PORT7CR IOMEM(0xe6050007)
953#define GPIO_PORT8CR 0xe6050008 953#define GPIO_PORT8CR IOMEM(0xe6050008)
954static void __init eva_init(void) 954static void __init eva_init(void)
955{ 955{
956 struct platform_device *usb = NULL; 956 struct platform_device *usb = NULL;
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index 4129008eae29..cb8c994e1430 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -108,12 +108,12 @@ static struct regulator_consumer_supply dummy_supplies[] = {
108#define FPGA_ETH_IRQ (FPGA_IRQ0 + 15) 108#define FPGA_ETH_IRQ (FPGA_IRQ0 + 15)
109static u16 bonito_fpga_read(u32 offset) 109static u16 bonito_fpga_read(u32 offset)
110{ 110{
111 return __raw_readw(0xf0003000 + offset); 111 return __raw_readw(IOMEM(0xf0003000) + offset);
112} 112}
113 113
114static void bonito_fpga_write(u32 offset, u16 val) 114static void bonito_fpga_write(u32 offset, u16 val)
115{ 115{
116 __raw_writew(val, 0xf0003000 + offset); 116 __raw_writew(val, IOMEM(0xf0003000) + offset);
117} 117}
118 118
119static void bonito_fpga_irq_disable(struct irq_data *data) 119static void bonito_fpga_irq_disable(struct irq_data *data)
@@ -361,8 +361,8 @@ static void __init bonito_map_io(void)
361#define BIT_ON(sw, bit) (sw & (1 << bit)) 361#define BIT_ON(sw, bit) (sw & (1 << bit))
362#define BIT_OFF(sw, bit) (!(sw & (1 << bit))) 362#define BIT_OFF(sw, bit) (!(sw & (1 << bit)))
363 363
364#define VCCQ1CR 0xE6058140 364#define VCCQ1CR IOMEM(0xE6058140)
365#define VCCQ1LCDCR 0xE6058186 365#define VCCQ1LCDCR IOMEM(0xE6058186)
366 366
367static void __init bonito_init(void) 367static void __init bonito_init(void)
368{ 368{
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 796fa00ad3c4..b179d4c213bb 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -106,7 +106,7 @@ static void usb_host_port_power(int port, int power)
106 return; 106 return;
107 107
108 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */ 108 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
109 __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008); 109 __raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008));
110} 110}
111 111
112static struct r8a66597_platdata usb_host_data = { 112static struct r8a66597_platdata usb_host_data = {
@@ -279,10 +279,10 @@ static void __init g3evm_init(void)
279 gpio_request(GPIO_FN_IDIN, NULL); 279 gpio_request(GPIO_FN_IDIN, NULL);
280 280
281 /* setup USB phy */ 281 /* setup USB phy */
282 __raw_writew(0x0300, 0xe605810a); /* USBCR1 */ 282 __raw_writew(0x0300, IOMEM(0xe605810a)); /* USBCR1 */
283 __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */ 283 __raw_writew(0x00e0, IOMEM(0xe60581c0)); /* CPFCH */
284 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */ 284 __raw_writew(0x6010, IOMEM(0xe60581c6)); /* CGPOSR */
285 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */ 285 __raw_writew(0x8a0a, IOMEM(0xe605810c)); /* USBCR2 */
286 286
287 /* KEYSC @ CN7 */ 287 /* KEYSC @ CN7 */
288 gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL); 288 gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL);
@@ -320,7 +320,7 @@ static void __init g3evm_init(void)
320 gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL); 320 gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL);
321 gpio_request(GPIO_FN_FRB, NULL); 321 gpio_request(GPIO_FN_FRB, NULL);
322 /* FOE, FCDE, FSC on dedicated pins */ 322 /* FOE, FCDE, FSC on dedicated pins */
323 __raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048); 323 __raw_writel(__raw_readl(IOMEM(0xe6158048)) & ~(1 << 15), IOMEM(0xe6158048));
324 324
325 /* IrDA */ 325 /* IrDA */
326 gpio_request(GPIO_FN_IRDA_OUT, NULL); 326 gpio_request(GPIO_FN_IRDA_OUT, NULL);
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index fa5dfc5c8ed6..22d689322533 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -126,7 +126,7 @@ static void usb_host_port_power(int port, int power)
126 return; 126 return;
127 127
128 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */ 128 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
129 __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008); 129 __raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008));
130} 130}
131 131
132static struct r8a66597_platdata usb_host_data = { 132static struct r8a66597_platdata usb_host_data = {
@@ -270,17 +270,17 @@ static struct platform_device *g4evm_devices[] __initdata = {
270 &sdhi1_device, 270 &sdhi1_device,
271}; 271};
272 272
273#define GPIO_SDHID0_D0 0xe60520fc 273#define GPIO_SDHID0_D0 IOMEM(0xe60520fc)
274#define GPIO_SDHID0_D1 0xe60520fd 274#define GPIO_SDHID0_D1 IOMEM(0xe60520fd)
275#define GPIO_SDHID0_D2 0xe60520fe 275#define GPIO_SDHID0_D2 IOMEM(0xe60520fe)
276#define GPIO_SDHID0_D3 0xe60520ff 276#define GPIO_SDHID0_D3 IOMEM(0xe60520ff)
277#define GPIO_SDHICMD0 0xe6052100 277#define GPIO_SDHICMD0 IOMEM(0xe6052100)
278 278
279#define GPIO_SDHID1_D0 0xe6052103 279#define GPIO_SDHID1_D0 IOMEM(0xe6052103)
280#define GPIO_SDHID1_D1 0xe6052104 280#define GPIO_SDHID1_D1 IOMEM(0xe6052104)
281#define GPIO_SDHID1_D2 0xe6052105 281#define GPIO_SDHID1_D2 IOMEM(0xe6052105)
282#define GPIO_SDHID1_D3 0xe6052106 282#define GPIO_SDHID1_D3 IOMEM(0xe6052106)
283#define GPIO_SDHICMD1 0xe6052107 283#define GPIO_SDHICMD1 IOMEM(0xe6052107)
284 284
285static void __init g4evm_init(void) 285static void __init g4evm_init(void)
286{ 286{
@@ -318,10 +318,10 @@ static void __init g4evm_init(void)
318 gpio_request(GPIO_FN_IDIN, NULL); 318 gpio_request(GPIO_FN_IDIN, NULL);
319 319
320 /* setup USB phy */ 320 /* setup USB phy */
321 __raw_writew(0x0200, 0xe605810a); /* USBCR1 */ 321 __raw_writew(0x0200, IOMEM(0xe605810a)); /* USBCR1 */
322 __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */ 322 __raw_writew(0x00e0, IOMEM(0xe60581c0)); /* CPFCH */
323 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */ 323 __raw_writew(0x6010, IOMEM(0xe60581c6)); /* CGPOSR */
324 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */ 324 __raw_writew(0x8a0a, IOMEM(0xe605810c)); /* USBCR2 */
325 325
326 /* KEYSC @ CN31 */ 326 /* KEYSC @ CN31 */
327 gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL); 327 gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL);
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 53b7ea92c32c..5ffafc1adf99 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -133,8 +133,8 @@ static struct platform_device usb_host_device = {
133 133
134/* USB Func CN17 */ 134/* USB Func CN17 */
135struct usbhs_private { 135struct usbhs_private {
136 unsigned int phy; 136 void __iomem *phy;
137 unsigned int cr2; 137 void __iomem *cr2;
138 struct renesas_usbhs_platform_info info; 138 struct renesas_usbhs_platform_info info;
139}; 139};
140 140
@@ -232,8 +232,8 @@ static u32 usbhs_pipe_cfg[] = {
232}; 232};
233 233
234static struct usbhs_private usbhs_private = { 234static struct usbhs_private usbhs_private = {
235 .phy = 0xe60781e0, /* USBPHYINT */ 235 .phy = IOMEM(0xe60781e0), /* USBPHYINT */
236 .cr2 = 0xe605810c, /* USBCR2 */ 236 .cr2 = IOMEM(0xe605810c), /* USBCR2 */
237 .info = { 237 .info = {
238 .platform_callback = { 238 .platform_callback = {
239 .hardware_init = usbhs_hardware_init, 239 .hardware_init = usbhs_hardware_init,
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 7ea2b31e3199..d271b464a8aa 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -583,8 +583,8 @@ out:
583#define USBHS0_POLL_INTERVAL (HZ * 5) 583#define USBHS0_POLL_INTERVAL (HZ * 5)
584 584
585struct usbhs_private { 585struct usbhs_private {
586 unsigned int usbphyaddr; 586 void __iomem *usbphyaddr;
587 unsigned int usbcrcaddr; 587 void __iomem *usbcrcaddr;
588 struct renesas_usbhs_platform_info info; 588 struct renesas_usbhs_platform_info info;
589 struct delayed_work work; 589 struct delayed_work work;
590 struct platform_device *pdev; 590 struct platform_device *pdev;
@@ -642,7 +642,7 @@ static void usbhs0_hardware_exit(struct platform_device *pdev)
642} 642}
643 643
644static struct usbhs_private usbhs0_private = { 644static struct usbhs_private usbhs0_private = {
645 .usbcrcaddr = 0xe605810c, /* USBCR2 */ 645 .usbcrcaddr = IOMEM(0xe605810c), /* USBCR2 */
646 .info = { 646 .info = {
647 .platform_callback = { 647 .platform_callback = {
648 .hardware_init = usbhs0_hardware_init, 648 .hardware_init = usbhs0_hardware_init,
@@ -775,8 +775,8 @@ static u32 usbhs1_pipe_cfg[] = {
775}; 775};
776 776
777static struct usbhs_private usbhs1_private = { 777static struct usbhs_private usbhs1_private = {
778 .usbphyaddr = 0xe60581e2, /* USBPHY1INTAP */ 778 .usbphyaddr = IOMEM(0xe60581e2), /* USBPHY1INTAP */
779 .usbcrcaddr = 0xe6058130, /* USBCR4 */ 779 .usbcrcaddr = IOMEM(0xe6058130), /* USBCR4 */
780 .info = { 780 .info = {
781 .platform_callback = { 781 .platform_callback = {
782 .hardware_init = usbhs1_hardware_init, 782 .hardware_init = usbhs1_hardware_init,
@@ -1401,12 +1401,12 @@ static struct i2c_board_info i2c1_devices[] = {
1401 }, 1401 },
1402}; 1402};
1403 1403
1404#define GPIO_PORT9CR 0xE6051009 1404#define GPIO_PORT9CR IOMEM(0xE6051009)
1405#define GPIO_PORT10CR 0xE605100A 1405#define GPIO_PORT10CR IOMEM(0xE605100A)
1406#define GPIO_PORT167CR 0xE60520A7 1406#define GPIO_PORT167CR IOMEM(0xE60520A7)
1407#define GPIO_PORT168CR 0xE60520A8 1407#define GPIO_PORT168CR IOMEM(0xE60520A8)
1408#define SRCR4 0xe61580bc 1408#define SRCR4 IOMEM(0xe61580bc)
1409#define USCCR1 0xE6058144 1409#define USCCR1 IOMEM(0xE6058144)
1410static void __init mackerel_init(void) 1410static void __init mackerel_init(void)
1411{ 1411{
1412 u32 srcr4; 1412 u32 srcr4;
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index ad5fccc7b5e7..6729e0032180 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -41,29 +41,29 @@
41 */ 41 */
42 42
43/* CPG registers */ 43/* CPG registers */
44#define FRQCRA 0xe6150000 44#define FRQCRA IOMEM(0xe6150000)
45#define FRQCRB 0xe6150004 45#define FRQCRB IOMEM(0xe6150004)
46#define VCLKCR1 0xE6150008 46#define VCLKCR1 IOMEM(0xE6150008)
47#define VCLKCR2 0xE615000c 47#define VCLKCR2 IOMEM(0xE615000c)
48#define FRQCRC 0xe61500e0 48#define FRQCRC IOMEM(0xe61500e0)
49#define FSIACKCR 0xe6150018 49#define FSIACKCR IOMEM(0xe6150018)
50#define PLLC01CR 0xe6150028 50#define PLLC01CR IOMEM(0xe6150028)
51 51
52#define SUBCKCR 0xe6150080 52#define SUBCKCR IOMEM(0xe6150080)
53#define USBCKCR 0xe615008c 53#define USBCKCR IOMEM(0xe615008c)
54 54
55#define MSTPSR0 0xe6150030 55#define MSTPSR0 IOMEM(0xe6150030)
56#define MSTPSR1 0xe6150038 56#define MSTPSR1 IOMEM(0xe6150038)
57#define MSTPSR2 0xe6150040 57#define MSTPSR2 IOMEM(0xe6150040)
58#define MSTPSR3 0xe6150048 58#define MSTPSR3 IOMEM(0xe6150048)
59#define MSTPSR4 0xe615004c 59#define MSTPSR4 IOMEM(0xe615004c)
60#define FSIBCKCR 0xe6150090 60#define FSIBCKCR IOMEM(0xe6150090)
61#define HDMICKCR 0xe6150094 61#define HDMICKCR IOMEM(0xe6150094)
62#define SMSTPCR0 0xe6150130 62#define SMSTPCR0 IOMEM(0xe6150130)
63#define SMSTPCR1 0xe6150134 63#define SMSTPCR1 IOMEM(0xe6150134)
64#define SMSTPCR2 0xe6150138 64#define SMSTPCR2 IOMEM(0xe6150138)
65#define SMSTPCR3 0xe615013c 65#define SMSTPCR3 IOMEM(0xe615013c)
66#define SMSTPCR4 0xe6150140 66#define SMSTPCR4 IOMEM(0xe6150140)
67 67
68/* Fixed 32 KHz root clock from EXTALR pin */ 68/* Fixed 32 KHz root clock from EXTALR pin */
69static struct clk extalr_clk = { 69static struct clk extalr_clk = {
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
index 162b791b8984..ef0a95e592c4 100644
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -24,28 +24,28 @@
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26/* SH7367 registers */ 26/* SH7367 registers */
27#define RTFRQCR 0xe6150000 27#define RTFRQCR IOMEM(0xe6150000)
28#define SYFRQCR 0xe6150004 28#define SYFRQCR IOMEM(0xe6150004)
29#define CMFRQCR 0xe61500E0 29#define CMFRQCR IOMEM(0xe61500E0)
30#define VCLKCR1 0xe6150008 30#define VCLKCR1 IOMEM(0xe6150008)
31#define VCLKCR2 0xe615000C 31#define VCLKCR2 IOMEM(0xe615000C)
32#define VCLKCR3 0xe615001C 32#define VCLKCR3 IOMEM(0xe615001C)
33#define SCLKACR 0xe6150010 33#define SCLKACR IOMEM(0xe6150010)
34#define SCLKBCR 0xe6150014 34#define SCLKBCR IOMEM(0xe6150014)
35#define SUBUSBCKCR 0xe6158080 35#define SUBUSBCKCR IOMEM(0xe6158080)
36#define SPUCKCR 0xe6150084 36#define SPUCKCR IOMEM(0xe6150084)
37#define MSUCKCR 0xe6150088 37#define MSUCKCR IOMEM(0xe6150088)
38#define MVI3CKCR 0xe6150090 38#define MVI3CKCR IOMEM(0xe6150090)
39#define VOUCKCR 0xe6150094 39#define VOUCKCR IOMEM(0xe6150094)
40#define MFCK1CR 0xe6150098 40#define MFCK1CR IOMEM(0xe6150098)
41#define MFCK2CR 0xe615009C 41#define MFCK2CR IOMEM(0xe615009C)
42#define PLLC1CR 0xe6150028 42#define PLLC1CR IOMEM(0xe6150028)
43#define PLLC2CR 0xe615002C 43#define PLLC2CR IOMEM(0xe615002C)
44#define RTMSTPCR0 0xe6158030 44#define RTMSTPCR0 IOMEM(0xe6158030)
45#define RTMSTPCR2 0xe6158038 45#define RTMSTPCR2 IOMEM(0xe6158038)
46#define SYMSTPCR0 0xe6158040 46#define SYMSTPCR0 IOMEM(0xe6158040)
47#define SYMSTPCR2 0xe6158048 47#define SYMSTPCR2 IOMEM(0xe6158048)
48#define CMMSTPCR0 0xe615804c 48#define CMMSTPCR0 IOMEM(0xe615804c)
49 49
50/* Fixed 32 KHz root clock from EXTALR pin */ 50/* Fixed 32 KHz root clock from EXTALR pin */
51static struct clk r_clk = { 51static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 5a2894b1c965..430a90ffa120 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -24,36 +24,36 @@
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26/* SH7372 registers */ 26/* SH7372 registers */
27#define FRQCRA 0xe6150000 27#define FRQCRA IOMEM(0xe6150000)
28#define FRQCRB 0xe6150004 28#define FRQCRB IOMEM(0xe6150004)
29#define FRQCRC 0xe61500e0 29#define FRQCRC IOMEM(0xe61500e0)
30#define FRQCRD 0xe61500e4 30#define FRQCRD IOMEM(0xe61500e4)
31#define VCLKCR1 0xe6150008 31#define VCLKCR1 IOMEM(0xe6150008)
32#define VCLKCR2 0xe615000c 32#define VCLKCR2 IOMEM(0xe615000c)
33#define VCLKCR3 0xe615001c 33#define VCLKCR3 IOMEM(0xe615001c)
34#define FMSICKCR 0xe6150010 34#define FMSICKCR IOMEM(0xe6150010)
35#define FMSOCKCR 0xe6150014 35#define FMSOCKCR IOMEM(0xe6150014)
36#define FSIACKCR 0xe6150018 36#define FSIACKCR IOMEM(0xe6150018)
37#define FSIBCKCR 0xe6150090 37#define FSIBCKCR IOMEM(0xe6150090)
38#define SUBCKCR 0xe6150080 38#define SUBCKCR IOMEM(0xe6150080)
39#define SPUCKCR 0xe6150084 39#define SPUCKCR IOMEM(0xe6150084)
40#define VOUCKCR 0xe6150088 40#define VOUCKCR IOMEM(0xe6150088)
41#define HDMICKCR 0xe6150094 41#define HDMICKCR IOMEM(0xe6150094)
42#define DSITCKCR 0xe6150060 42#define DSITCKCR IOMEM(0xe6150060)
43#define DSI0PCKCR 0xe6150064 43#define DSI0PCKCR IOMEM(0xe6150064)
44#define DSI1PCKCR 0xe6150098 44#define DSI1PCKCR IOMEM(0xe6150098)
45#define PLLC01CR 0xe6150028 45#define PLLC01CR IOMEM(0xe6150028)
46#define PLLC2CR 0xe615002c 46#define PLLC2CR IOMEM(0xe615002c)
47#define RMSTPCR0 0xe6150110 47#define RMSTPCR0 IOMEM(0xe6150110)
48#define RMSTPCR1 0xe6150114 48#define RMSTPCR1 IOMEM(0xe6150114)
49#define RMSTPCR2 0xe6150118 49#define RMSTPCR2 IOMEM(0xe6150118)
50#define RMSTPCR3 0xe615011c 50#define RMSTPCR3 IOMEM(0xe615011c)
51#define RMSTPCR4 0xe6150120 51#define RMSTPCR4 IOMEM(0xe6150120)
52#define SMSTPCR0 0xe6150130 52#define SMSTPCR0 IOMEM(0xe6150130)
53#define SMSTPCR1 0xe6150134 53#define SMSTPCR1 IOMEM(0xe6150134)
54#define SMSTPCR2 0xe6150138 54#define SMSTPCR2 IOMEM(0xe6150138)
55#define SMSTPCR3 0xe615013c 55#define SMSTPCR3 IOMEM(0xe615013c)
56#define SMSTPCR4 0xe6150140 56#define SMSTPCR4 IOMEM(0xe6150140)
57 57
58#define FSIDIVA 0xFE1F8000 58#define FSIDIVA 0xFE1F8000
59#define FSIDIVB 0xFE1F8008 59#define FSIDIVB 0xFE1F8008
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
index 85f2a3ec2c44..b8480d19e1c8 100644
--- a/arch/arm/mach-shmobile/clock-sh7377.c
+++ b/arch/arm/mach-shmobile/clock-sh7377.c
@@ -24,31 +24,31 @@
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26/* SH7377 registers */ 26/* SH7377 registers */
27#define RTFRQCR 0xe6150000 27#define RTFRQCR IOMEM(0xe6150000)
28#define SYFRQCR 0xe6150004 28#define SYFRQCR IOMEM(0xe6150004)
29#define CMFRQCR 0xe61500E0 29#define CMFRQCR IOMEM(0xe61500E0)
30#define VCLKCR1 0xe6150008 30#define VCLKCR1 IOMEM(0xe6150008)
31#define VCLKCR2 0xe615000C 31#define VCLKCR2 IOMEM(0xe615000C)
32#define VCLKCR3 0xe615001C 32#define VCLKCR3 IOMEM(0xe615001C)
33#define FMSICKCR 0xe6150010 33#define FMSICKCR IOMEM(0xe6150010)
34#define FMSOCKCR 0xe6150014 34#define FMSOCKCR IOMEM(0xe6150014)
35#define FSICKCR 0xe6150018 35#define FSICKCR IOMEM(0xe6150018)
36#define PLLC1CR 0xe6150028 36#define PLLC1CR IOMEM(0xe6150028)
37#define PLLC2CR 0xe615002C 37#define PLLC2CR IOMEM(0xe615002C)
38#define SUBUSBCKCR 0xe6150080 38#define SUBUSBCKCR IOMEM(0xe6150080)
39#define SPUCKCR 0xe6150084 39#define SPUCKCR IOMEM(0xe6150084)
40#define MSUCKCR 0xe6150088 40#define MSUCKCR IOMEM(0xe6150088)
41#define MVI3CKCR 0xe6150090 41#define MVI3CKCR IOMEM(0xe6150090)
42#define HDMICKCR 0xe6150094 42#define HDMICKCR IOMEM(0xe6150094)
43#define MFCK1CR 0xe6150098 43#define MFCK1CR IOMEM(0xe6150098)
44#define MFCK2CR 0xe615009C 44#define MFCK2CR IOMEM(0xe615009C)
45#define DSITCKCR 0xe6150060 45#define DSITCKCR IOMEM(0xe6150060)
46#define DSIPCKCR 0xe6150064 46#define DSIPCKCR IOMEM(0xe6150064)
47#define SMSTPCR0 0xe6150130 47#define SMSTPCR0 IOMEM(0xe6150130)
48#define SMSTPCR1 0xe6150134 48#define SMSTPCR1 IOMEM(0xe6150134)
49#define SMSTPCR2 0xe6150138 49#define SMSTPCR2 IOMEM(0xe6150138)
50#define SMSTPCR3 0xe615013C 50#define SMSTPCR3 IOMEM(0xe615013C)
51#define SMSTPCR4 0xe6150140 51#define SMSTPCR4 IOMEM(0xe6150140)
52 52
53/* Fixed 32 KHz root clock from EXTALR pin */ 53/* Fixed 32 KHz root clock from EXTALR pin */
54static struct clk r_clk = { 54static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 7f8da18a8580..516ff7f3e434 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -23,43 +23,43 @@
23#include <linux/clkdev.h> 23#include <linux/clkdev.h>
24#include <mach/common.h> 24#include <mach/common.h>
25 25
26#define FRQCRA 0xe6150000 26#define FRQCRA IOMEM(0xe6150000)
27#define FRQCRB 0xe6150004 27#define FRQCRB IOMEM(0xe6150004)
28#define FRQCRD 0xe61500e4 28#define FRQCRD IOMEM(0xe61500e4)
29#define VCLKCR1 0xe6150008 29#define VCLKCR1 IOMEM(0xe6150008)
30#define VCLKCR2 0xe615000C 30#define VCLKCR2 IOMEM(0xe615000C)
31#define VCLKCR3 0xe615001C 31#define VCLKCR3 IOMEM(0xe615001C)
32#define ZBCKCR 0xe6150010 32#define ZBCKCR IOMEM(0xe6150010)
33#define FLCKCR 0xe6150014 33#define FLCKCR IOMEM(0xe6150014)
34#define SD0CKCR 0xe6150074 34#define SD0CKCR IOMEM(0xe6150074)
35#define SD1CKCR 0xe6150078 35#define SD1CKCR IOMEM(0xe6150078)
36#define SD2CKCR 0xe615007C 36#define SD2CKCR IOMEM(0xe615007C)
37#define FSIACKCR 0xe6150018 37#define FSIACKCR IOMEM(0xe6150018)
38#define FSIBCKCR 0xe6150090 38#define FSIBCKCR IOMEM(0xe6150090)
39#define SUBCKCR 0xe6150080 39#define SUBCKCR IOMEM(0xe6150080)
40#define SPUACKCR 0xe6150084 40#define SPUACKCR IOMEM(0xe6150084)
41#define SPUVCKCR 0xe6150094 41#define SPUVCKCR IOMEM(0xe6150094)
42#define MSUCKCR 0xe6150088 42#define MSUCKCR IOMEM(0xe6150088)
43#define HSICKCR 0xe615008C 43#define HSICKCR IOMEM(0xe615008C)
44#define MFCK1CR 0xe6150098 44#define MFCK1CR IOMEM(0xe6150098)
45#define MFCK2CR 0xe615009C 45#define MFCK2CR IOMEM(0xe615009C)
46#define DSITCKCR 0xe6150060 46#define DSITCKCR IOMEM(0xe6150060)
47#define DSI0PCKCR 0xe6150064 47#define DSI0PCKCR IOMEM(0xe6150064)
48#define DSI1PCKCR 0xe6150068 48#define DSI1PCKCR IOMEM(0xe6150068)
49#define DSI0PHYCR 0xe615006C 49#define DSI0PHYCR 0xe615006C
50#define DSI1PHYCR 0xe6150070 50#define DSI1PHYCR 0xe6150070
51#define PLLECR 0xe61500d0 51#define PLLECR IOMEM(0xe61500d0)
52#define PLL0CR 0xe61500d8 52#define PLL0CR IOMEM(0xe61500d8)
53#define PLL1CR 0xe6150028 53#define PLL1CR IOMEM(0xe6150028)
54#define PLL2CR 0xe615002c 54#define PLL2CR IOMEM(0xe615002c)
55#define PLL3CR 0xe61500dc 55#define PLL3CR IOMEM(0xe61500dc)
56#define SMSTPCR0 0xe6150130 56#define SMSTPCR0 IOMEM(0xe6150130)
57#define SMSTPCR1 0xe6150134 57#define SMSTPCR1 IOMEM(0xe6150134)
58#define SMSTPCR2 0xe6150138 58#define SMSTPCR2 IOMEM(0xe6150138)
59#define SMSTPCR3 0xe615013c 59#define SMSTPCR3 IOMEM(0xe615013c)
60#define SMSTPCR4 0xe6150140 60#define SMSTPCR4 IOMEM(0xe6150140)
61#define SMSTPCR5 0xe6150144 61#define SMSTPCR5 IOMEM(0xe6150144)
62#define CKSCR 0xe61500c0 62#define CKSCR IOMEM(0xe61500c0)
63 63
64/* Fixed 32 KHz root clock from EXTALR pin */ 64/* Fixed 32 KHz root clock from EXTALR pin */
65static struct clk r_clk = { 65static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 844507d937cb..90a92b2c1c52 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -35,12 +35,12 @@ static inline int irq_to_gpio(unsigned int irq)
35 * the method to control only pull up/down/free. 35 * the method to control only pull up/down/free.
36 * this function should be replaced by correct gpio function 36 * this function should be replaced by correct gpio function
37 */ 37 */
38static inline void __init gpio_direction_none(u32 addr) 38static inline void __init gpio_direction_none(void __iomem * addr)
39{ 39{
40 __raw_writeb(0x00, addr); 40 __raw_writeb(0x00, addr);
41} 41}
42 42
43static inline void __init gpio_request_pullup(u32 addr) 43static inline void __init gpio_request_pullup(void __iomem * addr)
44{ 44{
45 u8 data = __raw_readb(addr); 45 u8 data = __raw_readb(addr);
46 46
@@ -49,7 +49,7 @@ static inline void __init gpio_request_pullup(u32 addr)
49 __raw_writeb(data, addr); 49 __raw_writeb(data, addr);
50} 50}
51 51
52static inline void __init gpio_request_pulldown(u32 addr) 52static inline void __init gpio_request_pulldown(void __iomem * addr)
53{ 53{
54 u8 data = __raw_readb(addr); 54 u8 data = __raw_readb(addr);
55 55
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index f04fad4ec4fb..ef66f1a8aa2e 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -29,14 +29,14 @@
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31 31
32#define INT2SMSKCR0 0xfe7822a0 32#define INT2SMSKCR0 IOMEM(0xfe7822a0)
33#define INT2SMSKCR1 0xfe7822a4 33#define INT2SMSKCR1 IOMEM(0xfe7822a4)
34#define INT2SMSKCR2 0xfe7822a8 34#define INT2SMSKCR2 IOMEM(0xfe7822a8)
35#define INT2SMSKCR3 0xfe7822ac 35#define INT2SMSKCR3 IOMEM(0xfe7822ac)
36#define INT2SMSKCR4 0xfe7822b0 36#define INT2SMSKCR4 IOMEM(0xfe7822b0)
37 37
38#define INT2NTSR0 0xfe700060 38#define INT2NTSR0 IOMEM(0xfe700060)
39#define INT2NTSR1 0xfe700064 39#define INT2NTSR1 IOMEM(0xfe700064)
40 40
41static int r8a7779_set_wake(struct irq_data *data, unsigned int on) 41static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
42{ 42{
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 2587a22842f2..a91caad7db7c 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -624,6 +624,9 @@ void sh7372_intcs_resume(void)
624 __raw_writeb(ffd5[k], intcs_ffd5 + k); 624 __raw_writeb(ffd5[k], intcs_ffd5 + k);
625} 625}
626 626
627#define E694_BASE IOMEM(0xe6940000)
628#define E695_BASE IOMEM(0xe6950000)
629
627static unsigned short e694[0x200]; 630static unsigned short e694[0x200];
628static unsigned short e695[0x200]; 631static unsigned short e695[0x200];
629 632
@@ -632,22 +635,22 @@ void sh7372_intca_suspend(void)
632 int k; 635 int k;
633 636
634 for (k = 0x00; k <= 0x38; k += 4) 637 for (k = 0x00; k <= 0x38; k += 4)
635 e694[k] = __raw_readw(0xe6940000 + k); 638 e694[k] = __raw_readw(E694_BASE + k);
636 639
637 for (k = 0x80; k <= 0xb4; k += 4) 640 for (k = 0x80; k <= 0xb4; k += 4)
638 e694[k] = __raw_readb(0xe6940000 + k); 641 e694[k] = __raw_readb(E694_BASE + k);
639 642
640 for (k = 0x180; k <= 0x1b4; k += 4) 643 for (k = 0x180; k <= 0x1b4; k += 4)
641 e694[k] = __raw_readb(0xe6940000 + k); 644 e694[k] = __raw_readb(E694_BASE + k);
642 645
643 for (k = 0x00; k <= 0x50; k += 4) 646 for (k = 0x00; k <= 0x50; k += 4)
644 e695[k] = __raw_readw(0xe6950000 + k); 647 e695[k] = __raw_readw(E695_BASE + k);
645 648
646 for (k = 0x80; k <= 0xa8; k += 4) 649 for (k = 0x80; k <= 0xa8; k += 4)
647 e695[k] = __raw_readb(0xe6950000 + k); 650 e695[k] = __raw_readb(E695_BASE + k);
648 651
649 for (k = 0x180; k <= 0x1a8; k += 4) 652 for (k = 0x180; k <= 0x1a8; k += 4)
650 e695[k] = __raw_readb(0xe6950000 + k); 653 e695[k] = __raw_readb(E695_BASE + k);
651} 654}
652 655
653void sh7372_intca_resume(void) 656void sh7372_intca_resume(void)
@@ -655,20 +658,20 @@ void sh7372_intca_resume(void)
655 int k; 658 int k;
656 659
657 for (k = 0x00; k <= 0x38; k += 4) 660 for (k = 0x00; k <= 0x38; k += 4)
658 __raw_writew(e694[k], 0xe6940000 + k); 661 __raw_writew(e694[k], E694_BASE + k);
659 662
660 for (k = 0x80; k <= 0xb4; k += 4) 663 for (k = 0x80; k <= 0xb4; k += 4)
661 __raw_writeb(e694[k], 0xe6940000 + k); 664 __raw_writeb(e694[k], E694_BASE + k);
662 665
663 for (k = 0x180; k <= 0x1b4; k += 4) 666 for (k = 0x180; k <= 0x1b4; k += 4)
664 __raw_writeb(e694[k], 0xe6940000 + k); 667 __raw_writeb(e694[k], E694_BASE + k);
665 668
666 for (k = 0x00; k <= 0x50; k += 4) 669 for (k = 0x00; k <= 0x50; k += 4)
667 __raw_writew(e695[k], 0xe6950000 + k); 670 __raw_writew(e695[k], E695_BASE + k);
668 671
669 for (k = 0x80; k <= 0xa8; k += 4) 672 for (k = 0x80; k <= 0xa8; k += 4)
670 __raw_writeb(e695[k], 0xe6950000 + k); 673 __raw_writeb(e695[k], E695_BASE + k);
671 674
672 for (k = 0x180; k <= 0x1a8; k += 4) 675 for (k = 0x180; k <= 0x1a8; k += 4)
673 __raw_writeb(e695[k], 0xe6950000 + k); 676 __raw_writeb(e695[k], E695_BASE + k);
674} 677}
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index ee447404c857..a8b2dd779429 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -366,10 +366,12 @@ static irqreturn_t sh73a0_irq_pin_demux(int irq, void *dev_id)
366 366
367static struct irqaction sh73a0_irq_pin_cascade[32]; 367static struct irqaction sh73a0_irq_pin_cascade[32];
368 368
369#define PINTER0 0xe69000a0 369#define PINTER0_PHYS 0xe69000a0
370#define PINTER1 0xe69000a4 370#define PINTER1_PHYS 0xe69000a4
371#define PINTRR0 0xe69000d0 371#define PINTER0_VIRT IOMEM(0xe69000a0)
372#define PINTRR1 0xe69000d4 372#define PINTER1_VIRT IOMEM(0xe69000a4)
373#define PINTRR0 IOMEM(0xe69000d0)
374#define PINTRR1 IOMEM(0xe69000d4)
373 375
374#define PINT0A_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq)) 376#define PINT0A_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq))
375#define PINT0B_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 8)) 377#define PINT0B_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 8))
@@ -377,14 +379,14 @@ static struct irqaction sh73a0_irq_pin_cascade[32];
377#define PINT0D_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 24)) 379#define PINT0D_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 24))
378#define PINT1E_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT1_IRQ(irq)) 380#define PINT1E_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT1_IRQ(irq))
379 381
380INTC_PINT(intc_pint0, PINTER0, 0xe69000b0, "sh73a0-pint0", \ 382INTC_PINT(intc_pint0, PINTER0_PHYS, 0xe69000b0, "sh73a0-pint0", \
381 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \ 383 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
382 INTC_PINT_V(A, PINT0A_IRQ), INTC_PINT_V(B, PINT0B_IRQ), \ 384 INTC_PINT_V(A, PINT0A_IRQ), INTC_PINT_V(B, PINT0B_IRQ), \
383 INTC_PINT_V(C, PINT0C_IRQ), INTC_PINT_V(D, PINT0D_IRQ), \ 385 INTC_PINT_V(C, PINT0C_IRQ), INTC_PINT_V(D, PINT0D_IRQ), \
384 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \ 386 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
385 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D)); 387 INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D));
386 388
387INTC_PINT(intc_pint1, PINTER1, 0xe69000c0, "sh73a0-pint1", \ 389INTC_PINT(intc_pint1, PINTER1_PHYS, 0xe69000c0, "sh73a0-pint1", \
388 INTC_PINT_E(E), INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, \ 390 INTC_PINT_E(E), INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, \
389 INTC_PINT_V(E, PINT1E_IRQ), INTC_PINT_V_NONE, \ 391 INTC_PINT_V(E, PINT1E_IRQ), INTC_PINT_V_NONE, \
390 INTC_PINT_V_NONE, INTC_PINT_V_NONE, \ 392 INTC_PINT_V_NONE, INTC_PINT_V_NONE, \
@@ -394,7 +396,7 @@ INTC_PINT(intc_pint1, PINTER1, 0xe69000c0, "sh73a0-pint1", \
394static struct irqaction sh73a0_pint0_cascade; 396static struct irqaction sh73a0_pint0_cascade;
395static struct irqaction sh73a0_pint1_cascade; 397static struct irqaction sh73a0_pint1_cascade;
396 398
397static void pint_demux(unsigned long rr, unsigned long er, int base_irq) 399static void pint_demux(void __iomem *rr, void __iomem *er, int base_irq)
398{ 400{
399 unsigned long value = ioread32(rr) & ioread32(er); 401 unsigned long value = ioread32(rr) & ioread32(er);
400 int k; 402 int k;
@@ -409,13 +411,13 @@ static void pint_demux(unsigned long rr, unsigned long er, int base_irq)
409 411
410static irqreturn_t sh73a0_pint0_demux(int irq, void *dev_id) 412static irqreturn_t sh73a0_pint0_demux(int irq, void *dev_id)
411{ 413{
412 pint_demux(PINTRR0, PINTER0, SH73A0_PINT0_IRQ(0)); 414 pint_demux(PINTRR0, PINTER0_VIRT, SH73A0_PINT0_IRQ(0));
413 return IRQ_HANDLED; 415 return IRQ_HANDLED;
414} 416}
415 417
416static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id) 418static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id)
417{ 419{
418 pint_demux(PINTRR1, PINTER1, SH73A0_PINT1_IRQ(0)); 420 pint_demux(PINTRR1, PINTER1_VIRT, SH73A0_PINT1_IRQ(0));
419 return IRQ_HANDLED; 421 return IRQ_HANDLED;
420} 422}
421 423
diff --git a/arch/arm/mach-shmobile/pm-rmobile.c b/arch/arm/mach-shmobile/pm-rmobile.c
index a8562540f1d6..32e177275e47 100644
--- a/arch/arm/mach-shmobile/pm-rmobile.c
+++ b/arch/arm/mach-shmobile/pm-rmobile.c
@@ -20,9 +20,9 @@
20#include <mach/pm-rmobile.h> 20#include <mach/pm-rmobile.h>
21 21
22/* SYSC */ 22/* SYSC */
23#define SPDCR 0xe6180008 23#define SPDCR IOMEM(0xe6180008)
24#define SWUCR 0xe6180014 24#define SWUCR IOMEM(0xe6180014)
25#define PSTR 0xe6180080 25#define PSTR IOMEM(0xe6180080)
26 26
27#define PSTR_RETRIES 100 27#define PSTR_RETRIES 100
28#define PSTR_DELAY_US 10 28#define PSTR_DELAY_US 10
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 792037069226..162121842a2b 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -29,45 +29,46 @@
29#include <mach/pm-rmobile.h> 29#include <mach/pm-rmobile.h>
30 30
31/* DBG */ 31/* DBG */
32#define DBGREG1 0xe6100020 32#define DBGREG1 IOMEM(0xe6100020)
33#define DBGREG9 0xe6100040 33#define DBGREG9 IOMEM(0xe6100040)
34 34
35/* CPGA */ 35/* CPGA */
36#define SYSTBCR 0xe6150024 36#define SYSTBCR IOMEM(0xe6150024)
37#define MSTPSR0 0xe6150030 37#define MSTPSR0 IOMEM(0xe6150030)
38#define MSTPSR1 0xe6150038 38#define MSTPSR1 IOMEM(0xe6150038)
39#define MSTPSR2 0xe6150040 39#define MSTPSR2 IOMEM(0xe6150040)
40#define MSTPSR3 0xe6150048 40#define MSTPSR3 IOMEM(0xe6150048)
41#define MSTPSR4 0xe615004c 41#define MSTPSR4 IOMEM(0xe615004c)
42#define PLLC01STPCR 0xe61500c8 42#define PLLC01STPCR IOMEM(0xe61500c8)
43 43
44/* SYSC */ 44/* SYSC */
45#define SBAR 0xe6180020 45#define SBAR IOMEM(0xe6180020)
46#define WUPRMSK 0xe6180028 46#define WUPRMSK IOMEM(0xe6180028)
47#define WUPSMSK 0xe618002c 47#define WUPSMSK IOMEM(0xe618002c)
48#define WUPSMSK2 0xe6180048 48#define WUPSMSK2 IOMEM(0xe6180048)
49#define WUPSFAC 0xe6180098 49#define WUPSFAC IOMEM(0xe6180098)
50#define IRQCR 0xe618022c 50#define IRQCR IOMEM(0xe618022c)
51#define IRQCR2 0xe6180238 51#define IRQCR2 IOMEM(0xe6180238)
52#define IRQCR3 0xe6180244 52#define IRQCR3 IOMEM(0xe6180244)
53#define IRQCR4 0xe6180248 53#define IRQCR4 IOMEM(0xe6180248)
54#define PDNSEL 0xe6180254 54#define PDNSEL IOMEM(0xe6180254)
55 55
56/* INTC */ 56/* INTC */
57#define ICR1A 0xe6900000 57#define ICR1A IOMEM(0xe6900000)
58#define ICR2A 0xe6900004 58#define ICR2A IOMEM(0xe6900004)
59#define ICR3A 0xe6900008 59#define ICR3A IOMEM(0xe6900008)
60#define ICR4A 0xe690000c 60#define ICR4A IOMEM(0xe690000c)
61#define INTMSK00A 0xe6900040 61#define INTMSK00A IOMEM(0xe6900040)
62#define INTMSK10A 0xe6900044 62#define INTMSK10A IOMEM(0xe6900044)
63#define INTMSK20A 0xe6900048 63#define INTMSK20A IOMEM(0xe6900048)
64#define INTMSK30A 0xe690004c 64#define INTMSK30A IOMEM(0xe690004c)
65 65
66/* MFIS */ 66/* MFIS */
67/* FIXME: pointing where? */
67#define SMFRAM 0xe6a70000 68#define SMFRAM 0xe6a70000
68 69
69/* AP-System Core */ 70/* AP-System Core */
70#define APARMBAREA 0xe6f10020 71#define APARMBAREA IOMEM(0xe6f10020)
71 72
72#ifdef CONFIG_PM 73#ifdef CONFIG_PM
73 74
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
index 2e3074ab75b3..e647f5410879 100644
--- a/arch/arm/mach-shmobile/setup-sh7367.c
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -462,7 +462,7 @@ static void __init sh7367_earlytimer_init(void)
462 shmobile_earlytimer_init(); 462 shmobile_earlytimer_init();
463} 463}
464 464
465#define SYMSTPCR2 0xe6158048 465#define SYMSTPCR2 IOMEM(0xe6158048)
466#define SYMSTPCR2_CMT1 (1 << 29) 466#define SYMSTPCR2_CMT1 (1 << 29)
467 467
468void __init sh7367_add_early_devices(void) 468void __init sh7367_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
index 855b1506caf8..edcf98bb7012 100644
--- a/arch/arm/mach-shmobile/setup-sh7377.c
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -484,7 +484,7 @@ static void __init sh7377_earlytimer_init(void)
484 shmobile_earlytimer_init(); 484 shmobile_earlytimer_init();
485} 485}
486 486
487#define SMSTPCR3 0xe615013c 487#define SMSTPCR3 IOMEM(0xe615013c)
488#define SMSTPCR3_CMT1 (1 << 29) 488#define SMSTPCR3_CMT1 (1 << 29)
489 489
490void __init sh7377_add_early_devices(void) 490void __init sh7377_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index d230af656fc9..a13c97b4ba1d 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -759,7 +759,7 @@ static struct platform_device *sh73a0_late_devices[] __initdata = {
759 &mpdma0_device, 759 &mpdma0_device,
760}; 760};
761 761
762#define SRCR2 0xe61580b0 762#define SRCR2 IOMEM(0xe61580b0)
763 763
764void __init sh73a0_add_standard_devices(void) 764void __init sh73a0_add_standard_devices(void)
765{ 765{
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-06 00:46:55 -0500