aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-shmobile
diff options
context:
space:
mode:
authorMagnus Damm <damm@opensource.se>2011-05-23 01:10:36 -0400
committerPaul Mundt <lethal@linux-sh.org>2011-05-23 23:42:52 -0400
commitfb66c5238547495b4a79f590b20400683702448a (patch)
treed9b3e39012ab334c25f2f1e3a2192ca6c9dc698b /arch/arm/mach-shmobile
parent2007aea18c2c7262614bf942f95b3e1f519bd409 (diff)
ARM: mach-shmobile: Add SDHI support for AG5EVM and sh73a0
Add SDHI0 and SDHI1 support to the AG5EVM board including platform data, pinmux configuration and clock bindings. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c103
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c16
2 files changed, 118 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 083dc0f364c1..7894cd125f94 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -34,6 +34,8 @@
34#include <linux/input/sh_keysc.h> 34#include <linux/input/sh_keysc.h>
35#include <linux/mmc/host.h> 35#include <linux/mmc/host.h>
36#include <linux/mmc/sh_mmcif.h> 36#include <linux/mmc/sh_mmcif.h>
37#include <linux/mmc/sh_mobile_sdhi.h>
38#include <linux/mfd/tmio.h>
37#include <linux/sh_clk.h> 39#include <linux/sh_clk.h>
38#include <video/sh_mobile_lcdc.h> 40#include <video/sh_mobile_lcdc.h>
39#include <video/sh_mipi_dsi.h> 41#include <video/sh_mipi_dsi.h>
@@ -327,6 +329,85 @@ static struct platform_device mipidsi0_device = {
327 }, 329 },
328}; 330};
329 331
332static struct sh_mobile_sdhi_info sdhi0_info = {
333 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
334 .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
335};
336
337static struct resource sdhi0_resources[] = {
338 [0] = {
339 .name = "SDHI0",
340 .start = 0xee100000,
341 .end = 0xee1000ff,
342 .flags = IORESOURCE_MEM,
343 },
344 [1] = {
345 .start = gic_spi(83),
346 .flags = IORESOURCE_IRQ,
347 },
348 [2] = {
349 .start = gic_spi(84),
350 .flags = IORESOURCE_IRQ,
351 },
352 [3] = {
353 .start = gic_spi(85),
354 .flags = IORESOURCE_IRQ,
355 },
356};
357
358static struct platform_device sdhi0_device = {
359 .name = "sh_mobile_sdhi",
360 .id = 0,
361 .num_resources = ARRAY_SIZE(sdhi0_resources),
362 .resource = sdhi0_resources,
363 .dev = {
364 .platform_data = &sdhi0_info,
365 },
366};
367
368void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
369{
370 gpio_set_value(GPIO_PORT114, state);
371}
372
373static struct sh_mobile_sdhi_info sh_sdhi1_platdata = {
374 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
375 .tmio_caps = MMC_CAP_NONREMOVABLE,
376 .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
377 .set_pwr = ag5evm_sdhi1_set_pwr,
378};
379
380static struct resource sdhi1_resources[] = {
381 [0] = {
382 .name = "SDHI1",
383 .start = 0xee120000,
384 .end = 0xee1200ff,
385 .flags = IORESOURCE_MEM,
386 },
387 [1] = {
388 .start = gic_spi(87),
389 .flags = IORESOURCE_IRQ,
390 },
391 [2] = {
392 .start = gic_spi(88),
393 .flags = IORESOURCE_IRQ,
394 },
395 [3] = {
396 .start = gic_spi(89),
397 .flags = IORESOURCE_IRQ,
398 },
399};
400
401static struct platform_device sdhi1_device = {
402 .name = "sh_mobile_sdhi",
403 .id = 1,
404 .dev = {
405 .platform_data = &sh_sdhi1_platdata,
406 },
407 .num_resources = ARRAY_SIZE(sdhi1_resources),
408 .resource = sdhi1_resources,
409};
410
330static struct platform_device *ag5evm_devices[] __initdata = { 411static struct platform_device *ag5evm_devices[] __initdata = {
331 &eth_device, 412 &eth_device,
332 &keysc_device, 413 &keysc_device,
@@ -335,6 +416,8 @@ static struct platform_device *ag5evm_devices[] __initdata = {
335 &irda_device, 416 &irda_device,
336 &lcdc0_device, 417 &lcdc0_device,
337 &mipidsi0_device, 418 &mipidsi0_device,
419 &sdhi0_device,
420 &sdhi1_device,
338}; 421};
339 422
340static struct map_desc ag5evm_io_desc[] __initdata = { 423static struct map_desc ag5evm_io_desc[] __initdata = {
@@ -456,6 +539,26 @@ static void __init ag5evm_init(void)
456 /* MIPI-DSI clock setup */ 539 /* MIPI-DSI clock setup */
457 __raw_writel(0x2a809010, DSI0PHYCR); 540 __raw_writel(0x2a809010, DSI0PHYCR);
458 541
542 /* enable SDHI0 on CN15 [SD I/F] */
543 gpio_request(GPIO_FN_SDHICD0, NULL);
544 gpio_request(GPIO_FN_SDHIWP0, NULL);
545 gpio_request(GPIO_FN_SDHICMD0, NULL);
546 gpio_request(GPIO_FN_SDHICLK0, NULL);
547 gpio_request(GPIO_FN_SDHID0_3, NULL);
548 gpio_request(GPIO_FN_SDHID0_2, NULL);
549 gpio_request(GPIO_FN_SDHID0_1, NULL);
550 gpio_request(GPIO_FN_SDHID0_0, NULL);
551
552 /* enable SDHI1 on CN4 [WLAN I/F] */
553 gpio_request(GPIO_FN_SDHICLK1, NULL);
554 gpio_request(GPIO_FN_SDHICMD1_PU, NULL);
555 gpio_request(GPIO_FN_SDHID1_3_PU, NULL);
556 gpio_request(GPIO_FN_SDHID1_2_PU, NULL);
557 gpio_request(GPIO_FN_SDHID1_1_PU, NULL);
558 gpio_request(GPIO_FN_SDHID1_0_PU, NULL);
559 gpio_request(GPIO_PORT114, "sdhi1_power");
560 gpio_direction_output(GPIO_PORT114, 0);
561
459#ifdef CONFIG_CACHE_L2X0 562#ifdef CONFIG_CACHE_L2X0
460 /* Shared attribute override enable, 64K*8way */ 563 /* Shared attribute override enable, 64K*8way */
461 l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff); 564 l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 7e58904c1c8c..f86e463f174d 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -266,7 +266,7 @@ enum { MSTP001,
266 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, 266 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
267 MSTP219, 267 MSTP219,
268 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 268 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
269 MSTP331, MSTP329, MSTP325, MSTP323, MSTP312, 269 MSTP331, MSTP329, MSTP325, MSTP323, MSTP314, MSTP313, MSTP312, MSTP311,
270 MSTP411, MSTP410, MSTP403, 270 MSTP411, MSTP410, MSTP403,
271 MSTP_NR }; 271 MSTP_NR };
272 272
@@ -295,7 +295,10 @@ static struct clk mstp_clks[MSTP_NR] = {
295 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ 295 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
296 [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */ 296 [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
297 [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */ 297 [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
298 [MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */
299 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
298 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ 300 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
301 [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
299 [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */ 302 [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
300 [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */ 303 [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
301 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ 304 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
@@ -313,6 +316,9 @@ static struct clk_lookup lookups[] = {
313 CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), 316 CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
314 CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]), 317 CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
315 CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), 318 CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
319 CLKDEV_CON_ID("sdhi0_clk", &div6_clks[DIV6_SDHI0]),
320 CLKDEV_CON_ID("sdhi1_clk", &div6_clks[DIV6_SDHI1]),
321 CLKDEV_CON_ID("sdhi2_clk", &div6_clks[DIV6_SDHI2]),
316 CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]), 322 CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
317 CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]), 323 CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
318 CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]), 324 CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
@@ -341,7 +347,10 @@ static struct clk_lookup lookups[] = {
341 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ 347 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
342 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */ 348 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
343 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */ 349 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
350 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
351 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
344 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ 352 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
353 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
345 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ 354 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
346 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ 355 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
347 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ 356 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
@@ -351,6 +360,11 @@ void __init sh73a0_clock_init(void)
351{ 360{
352 int k, ret = 0; 361 int k, ret = 0;
353 362
363 /* Set SDHI clocks to a known state */
364 __raw_writel(0x108, SD0CKCR);
365 __raw_writel(0x108, SD1CKCR);
366 __raw_writel(0x108, SD2CKCR);
367
354 /* detect main clock parent */ 368 /* detect main clock parent */
355 switch ((__raw_readl(CKSCR) >> 24) & 0x03) { 369 switch ((__raw_readl(CKSCR) >> 24) & 0x03) {
356 case 0: 370 case 0: