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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-29 21:02:10 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-29 21:02:10 -0400 |
commit | 820d41cf0cd0e94a5661e093821e2e5c6b36a9d8 (patch) | |
tree | 4d03046048dc52a8fa539c7e7b846e02738d8ca5 /arch/arm/mach-shmobile/smp-sh73a0.c | |
parent | 6268b325c3066234e7bddb99d2b98bcedb0c0033 (diff) | |
parent | 88b48684fe2d4f6207223423227c80d5408bccaf (diff) |
Merge tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: cleanups of io includes" from Olof Johansson:
"Rob Herring has done a sweeping change cleaning up all of the
mach/io.h includes, moving some of the oft-repeated macros to a common
location and removing a bunch of boiler plate. This is another step
closer to a common zImage for multiple platforms."
Fix up various fairly trivial conflicts (<mach/io.h> removal vs changes
around it, tegra localtimer.o is *still* gone, yadda-yadda).
* tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
ARM: tegra: Include assembler.h in sleep.S to fix build break
ARM: pxa: use common IOMEM definition
ARM: dma-mapping: convert ARCH_HAS_DMA_SET_COHERENT_MASK to kconfig symbol
ARM: __io abuse cleanup
ARM: create a common IOMEM definition
ARM: iop13xx: fix missing declaration of iop13xx_init_early
ARM: fix ioremap/iounmap for !CONFIG_MMU
ARM: kill off __mem_pci
ARM: remove bunch of now unused mach/io.h files
ARM: make mach/io.h include optional
ARM: clps711x: remove unneeded include of mach/io.h
ARM: dove: add explicit include of dove.h to addr-map.c
ARM: at91: add explicit include of hardware.h to uncompressor
ARM: ep93xx: clean-up mach/io.h
ARM: tegra: clean-up mach/io.h
ARM: orion5x: clean-up mach/io.h
ARM: davinci: remove unneeded mach/io.h include
[media] davinci: remove includes of mach/io.h
ARM: OMAP: Remove remaining includes for mach/io.h
ARM: msm: clean-up mach/io.h
...
Diffstat (limited to 'arch/arm/mach-shmobile/smp-sh73a0.c')
-rw-r--r-- | arch/arm/mach-shmobile/smp-sh73a0.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index c0a9093ba3a8..14ad8b052f1a 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c | |||
@@ -28,11 +28,11 @@ | |||
28 | #include <asm/smp_twd.h> | 28 | #include <asm/smp_twd.h> |
29 | #include <asm/hardware/gic.h> | 29 | #include <asm/hardware/gic.h> |
30 | 30 | ||
31 | #define WUPCR 0xe6151010 | 31 | #define WUPCR IOMEM(0xe6151010) |
32 | #define SRESCR 0xe6151018 | 32 | #define SRESCR IOMEM(0xe6151018) |
33 | #define PSTR 0xe6151040 | 33 | #define PSTR IOMEM(0xe6151040) |
34 | #define SBAR 0xe6180020 | 34 | #define SBAR IOMEM(0xe6180020) |
35 | #define APARMBAREA 0xe6f10020 | 35 | #define APARMBAREA IOMEM(0xe6f10020) |
36 | 36 | ||
37 | static void __iomem *scu_base_addr(void) | 37 | static void __iomem *scu_base_addr(void) |
38 | { | 38 | { |
@@ -78,10 +78,10 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu) | |||
78 | /* enable cache coherency */ | 78 | /* enable cache coherency */ |
79 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); | 79 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); |
80 | 80 | ||
81 | if (((__raw_readl(__io(PSTR)) >> (4 * cpu)) & 3) == 3) | 81 | if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3) |
82 | __raw_writel(1 << cpu, __io(WUPCR)); /* wake up */ | 82 | __raw_writel(1 << cpu, WUPCR); /* wake up */ |
83 | else | 83 | else |
84 | __raw_writel(1 << cpu, __io(SRESCR)); /* reset */ | 84 | __raw_writel(1 << cpu, SRESCR); /* reset */ |
85 | 85 | ||
86 | return 0; | 86 | return 0; |
87 | } | 87 | } |
@@ -93,8 +93,8 @@ void __init sh73a0_smp_prepare_cpus(void) | |||
93 | scu_enable(scu_base_addr()); | 93 | scu_enable(scu_base_addr()); |
94 | 94 | ||
95 | /* Map the reset vector (in headsmp.S) */ | 95 | /* Map the reset vector (in headsmp.S) */ |
96 | __raw_writel(0, __io(APARMBAREA)); /* 4k */ | 96 | __raw_writel(0, APARMBAREA); /* 4k */ |
97 | __raw_writel(__pa(shmobile_secondary_vector), __io(SBAR)); | 97 | __raw_writel(__pa(shmobile_secondary_vector), SBAR); |
98 | 98 | ||
99 | /* enable cache coherency on CPU0 */ | 99 | /* enable cache coherency on CPU0 */ |
100 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); | 100 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); |