ARM: shmobile: r8a7779: split r8a7779_init_irq_extpin() for DT

r8a7779 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3, and r8a7779_init_irq_extpin()
is controlling it via irlm parameter.
But this function registers renesas_intc_irqpin driver
if irlm was set, and this value depends on platform.
This is not good for DT.
This patch splits r8a7779_init_irq_extpin() function
into "mode settings" and "funtion register" parts

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

1 files changed, 5 insertions, 1 deletions

diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index eacb2f783693..13049e9d691c 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -98,7 +98,7 @@ static struct resource irqpin0_resources[] __initdata = {
         DEFINE_RES_IRQ(gic_spi(30)), /* IRQ3 */
 };
 
-void __init r8a7779_init_irq_extpin(int irlm)
+void __init r8a7779_init_irq_extpin_dt(int irlm)
 {
         void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
         u32 tmp;
@@ -116,7 +116,11 @@ void __init r8a7779_init_irq_extpin(int irlm)
         tmp |= (1 << 21); /* LVLMODE = 1 */
         iowrite32(tmp, icr0);
         iounmap(icr0);
+}
 
+void __init r8a7779_init_irq_extpin(int irlm)
+{
+        r8a7779_init_irq_extpin_dt(irlm);
         if (irlm)
                 platform_device_register_resndata(
                         &platform_bus, "renesas_intc_irqpin", -1,