ARM: mach-shmobile: R-Mobile A1 support.

This adds preliminary support for the R8A7740 (R-Mobile A1) CPU

Timer, serial, gic, clock are supported at this point.
This patch is based on v0.1 manual

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 246 insertions, 0 deletions

diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
new file mode 100644
index 000000000000..55485187f0c7
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -0,0 +1,246 @@
+/*
+ * R8A7740 processor support
+ *
+ * Copyright (C) 2011  Renesas Solutions Corp.
+ * Copyright (C) 2011  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
+#include <mach/r8a7740.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+/* SCIFA0 */
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xe6c40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .scscr          = SCSCR_RE | SCSCR_TE,
+        .scbrr_algo_id  = SCBRR_ALGO_4,
+        .type           = PORT_SCIFA,
+        .irqs           = SCIx_IRQ_MUXED(gic_spi(100)),
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+/* SCIFA1 */
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xe6c50000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .scscr          = SCSCR_RE | SCSCR_TE,
+        .scbrr_algo_id  = SCBRR_ALGO_4,
+        .type           = PORT_SCIFA,
+        .irqs           = SCIx_IRQ_MUXED(gic_spi(101)),
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+/* SCIFA2 */
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xe6c60000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .scscr          = SCSCR_RE | SCSCR_TE,
+        .scbrr_algo_id  = SCBRR_ALGO_4,
+        .type           = PORT_SCIFA,
+        .irqs           = SCIx_IRQ_MUXED(gic_spi(102)),
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+/* SCIFA3 */
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xe6c70000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .scscr          = SCSCR_RE | SCSCR_TE,
+        .scbrr_algo_id  = SCBRR_ALGO_4,
+        .type           = PORT_SCIFA,
+        .irqs           = SCIx_IRQ_MUXED(gic_spi(103)),
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+/* SCIFA4 */
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xe6c80000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .scscr          = SCSCR_RE | SCSCR_TE,
+        .scbrr_algo_id  = SCBRR_ALGO_4,
+        .type           = PORT_SCIFA,
+        .irqs           = SCIx_IRQ_MUXED(gic_spi(104)),
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+/* SCIFA5 */
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xe6cb0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .scscr          = SCSCR_RE | SCSCR_TE,
+        .scbrr_algo_id  = SCBRR_ALGO_4,
+        .type           = PORT_SCIFA,
+        .irqs           = SCIx_IRQ_MUXED(gic_spi(105)),
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+
+/* SCIFA6 */
+static struct plat_sci_port scif6_platform_data = {
+        .mapbase        = 0xe6cc0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .scscr          = SCSCR_RE | SCSCR_TE,
+        .scbrr_algo_id  = SCBRR_ALGO_4,
+        .type           = PORT_SCIFA,
+        .irqs           = SCIx_IRQ_MUXED(gic_spi(106)),
+};
+
+static struct platform_device scif6_device = {
+        .name           = "sh-sci",
+        .id             = 6,
+        .dev            = {
+                .platform_data  = &scif6_platform_data,
+        },
+};
+
+/* SCIFA7 */
+static struct plat_sci_port scif7_platform_data = {
+        .mapbase        = 0xe6cd0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .scscr          = SCSCR_RE | SCSCR_TE,
+        .scbrr_algo_id  = SCBRR_ALGO_4,
+        .type           = PORT_SCIFA,
+        .irqs           = SCIx_IRQ_MUXED(gic_spi(107)),
+};
+
+static struct platform_device scif7_device = {
+        .name           = "sh-sci",
+        .id             = 7,
+        .dev            = {
+                .platform_data  = &scif7_platform_data,
+        },
+};
+
+/* SCIFB */
+static struct plat_sci_port scifb_platform_data = {
+        .mapbase        = 0xe6c30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .scscr          = SCSCR_RE | SCSCR_TE,
+        .scbrr_algo_id  = SCBRR_ALGO_4,
+        .type           = PORT_SCIFB,
+        .irqs           = SCIx_IRQ_MUXED(gic_spi(108)),
+};
+
+static struct platform_device scifb_device = {
+        .name           = "sh-sci",
+        .id             = 8,
+        .dev            = {
+                .platform_data  = &scifb_platform_data,
+        },
+};
+
+/* CMT */
+static struct sh_timer_config cmt10_platform_data = {
+        .name = "CMT10",
+        .channel_offset = 0x10,
+        .timer_bit = 0,
+        .clockevent_rating = 125,
+        .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+        [0] = {
+                .name   = "CMT10",
+                .start  = 0xe6138010,
+                .end    = 0xe613801b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = gic_spi(58),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt10_device = {
+        .name           = "sh_cmt",
+        .id             = 10,
+        .dev = {
+                .platform_data  = &cmt10_platform_data,
+        },
+        .resource       = cmt10_resources,
+        .num_resources  = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *r8a7740_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &scif7_device,
+        &scifb_device,
+        &cmt10_device,
+};
+
+void __init r8a7740_add_standard_devices(void)
+{
+        platform_add_devices(r8a7740_early_devices,
+                            ARRAY_SIZE(r8a7740_early_devices));
+}
+
+void __init r8a7740_add_early_devices(void)
+{
+        early_platform_add_devices(r8a7740_early_devices,
+                                   ARRAY_SIZE(r8a7740_early_devices));
+}