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authorGeert Uytterhoeven <geert+renesas@glider.be>2014-12-03 08:41:44 -0500
committerSimon Horman <horms+renesas@verge.net.au>2015-01-12 19:33:19 -0500
commit25717b857360760755b83b4e606d61e1fc38552f (patch)
tree7c2a7926d8d2a380917c917985ab8c39db8a4cad /arch/arm/mach-shmobile/pm-sh7372.c
parent4b9d62e02a0124d06fbbb9c4b01bd69f3c4dcd35 (diff)
ARM: shmobile: R-Mobile: Store SYSC base address in rmobile_pm_domain
Replace the hardcoded addresses for accessing the SYSC PM domain registers by register offsets, relative to the SYSC base address stored in struct rmobile_pm_domain. In the future, the SYSC base address will come from DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/pm-sh7372.c')
-rw-r--r--arch/arm/mach-shmobile/pm-sh7372.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 0e37da654ed5..c0293ae4b013 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -45,6 +45,8 @@
45#define PLLC01STPCR IOMEM(0xe61500c8) 45#define PLLC01STPCR IOMEM(0xe61500c8)
46 46
47/* SYSC */ 47/* SYSC */
48#define SYSC_BASE IOMEM(0xe6180000)
49
48#define SBAR IOMEM(0xe6180020) 50#define SBAR IOMEM(0xe6180020)
49#define WUPRMSK IOMEM(0xe6180028) 51#define WUPRMSK IOMEM(0xe6180028)
50#define WUPSMSK IOMEM(0xe618002c) 52#define WUPSMSK IOMEM(0xe618002c)
@@ -118,24 +120,28 @@ static struct rmobile_pm_domain sh7372_pm_domains[] = {
118 .genpd.name = "A4LC", 120 .genpd.name = "A4LC",
119 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 121 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
120 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 122 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
123 .base = SYSC_BASE,
121 .bit_shift = 1, 124 .bit_shift = 1,
122 }, 125 },
123 { 126 {
124 .genpd.name = "A4MP", 127 .genpd.name = "A4MP",
125 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 128 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
126 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 129 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
130 .base = SYSC_BASE,
127 .bit_shift = 2, 131 .bit_shift = 2,
128 }, 132 },
129 { 133 {
130 .genpd.name = "D4", 134 .genpd.name = "D4",
131 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 135 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
132 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 136 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
137 .base = SYSC_BASE,
133 .bit_shift = 3, 138 .bit_shift = 3,
134 }, 139 },
135 { 140 {
136 .genpd.name = "A4R", 141 .genpd.name = "A4R",
137 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 142 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
138 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 143 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
144 .base = SYSC_BASE,
139 .bit_shift = 5, 145 .bit_shift = 5,
140 .suspend = sh7372_a4r_pd_suspend, 146 .suspend = sh7372_a4r_pd_suspend,
141 .resume = sh7372_intcs_resume, 147 .resume = sh7372_intcs_resume,
@@ -144,18 +150,21 @@ static struct rmobile_pm_domain sh7372_pm_domains[] = {
144 .genpd.name = "A3RV", 150 .genpd.name = "A3RV",
145 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 151 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
146 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 152 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
153 .base = SYSC_BASE,
147 .bit_shift = 6, 154 .bit_shift = 6,
148 }, 155 },
149 { 156 {
150 .genpd.name = "A3RI", 157 .genpd.name = "A3RI",
151 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 158 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
152 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 159 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
160 .base = SYSC_BASE,
153 .bit_shift = 8, 161 .bit_shift = 8,
154 }, 162 },
155 { 163 {
156 .genpd.name = "A4S", 164 .genpd.name = "A4S",
157 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 165 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
158 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 166 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
167 .base = SYSC_BASE,
159 .bit_shift = 10, 168 .bit_shift = 10,
160 .gov = &pm_domain_always_on_gov, 169 .gov = &pm_domain_always_on_gov,
161 .no_debug = true, 170 .no_debug = true,
@@ -166,6 +175,7 @@ static struct rmobile_pm_domain sh7372_pm_domains[] = {
166 .genpd.name = "A3SP", 175 .genpd.name = "A3SP",
167 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 176 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
168 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 177 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
178 .base = SYSC_BASE,
169 .bit_shift = 11, 179 .bit_shift = 11,
170 .gov = &pm_domain_always_on_gov, 180 .gov = &pm_domain_always_on_gov,
171 .no_debug = true, 181 .no_debug = true,
@@ -175,6 +185,7 @@ static struct rmobile_pm_domain sh7372_pm_domains[] = {
175 .genpd.name = "A3SG", 185 .genpd.name = "A3SG",
176 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 186 .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
177 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS, 187 .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
188 .base = SYSC_BASE,
178 .bit_shift = 13, 189 .bit_shift = 13,
179 }, 190 },
180}; 191};