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authorMagnus Damm <damm@opensource.se>2012-03-28 06:23:11 -0400
committerRafael J. Wysocki <rjw@sisk.pl>2012-04-11 06:11:50 -0400
commit012f825f13d8e5f1007d1f604517dba1b9a5586e (patch)
tree5edb0eb512e3facd620d5fce9d8392620e951c3d /arch/arm/mach-shmobile/intc-sh7372.c
parent2ff6530c065814035df505ae8a6ddf461b3441d3 (diff)
ARM: mach-shmobile: Rework sh7372 INTCS demuxer V2
This patch is the sh7372 INTC demux rework V2. Updates the sh7372 INTCS demuxer to not hook into the INTCA interrupt controller. The mask register for the chained INTCS interrupt source happens to be located in the INTCS register range instead of the INTCA as expected. To allow each INTCA and INTCS interrupt controller to work in their own IRQ range this patch moves the INTCS vector away. Needed for future IRQ domain support. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Diffstat (limited to 'arch/arm/mach-shmobile/intc-sh7372.c')
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c23
1 files changed, 14 insertions, 9 deletions
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 0ba8b7b69f60..2587a22842f2 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -19,6 +19,7 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/module.h>
22#include <linux/irq.h> 23#include <linux/irq.h>
23#include <linux/io.h> 24#include <linux/io.h>
24#include <linux/sh_intc.h> 25#include <linux/sh_intc.h>
@@ -315,8 +316,6 @@ enum {
315 UNUSED_INTCS = 0, 316 UNUSED_INTCS = 0,
316 ENABLED_INTCS, 317 ENABLED_INTCS,
317 318
318 INTCS,
319
320 /* interrupt sources INTCS */ 319 /* interrupt sources INTCS */
321 320
322 /* IRQ0S - IRQ31S */ 321 /* IRQ0S - IRQ31S */
@@ -430,8 +429,6 @@ static struct intc_vect intcs_vectors[] = {
430 INTCS_VECT(CPORTS2R, 0x1a20), 429 INTCS_VECT(CPORTS2R, 0x1a20),
431 /* CEC */ 430 /* CEC */
432 INTCS_VECT(JPU6E, 0x1a80), 431 INTCS_VECT(JPU6E, 0x1a80),
433
434 INTC_VECT(INTCS, 0xf80),
435}; 432};
436 433
437static struct intc_group intcs_groups[] __initdata = { 434static struct intc_group intcs_groups[] __initdata = {
@@ -494,9 +491,6 @@ static struct intc_mask_reg intcs_mask_registers[] = {
494 { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */ 491 { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */
495 { MFIS2_INTCS, CPORTS2R, 0, 0, 492 { MFIS2_INTCS, CPORTS2R, 0, 0,
496 JPU6E, 0, 0, 0 } }, 493 JPU6E, 0, 0, 0 } },
497 { 0xffd20104, 0, 16, /* INTAMASK */
498 { 0, 0, 0, 0, 0, 0, 0, 0,
499 0, 0, 0, 0, 0, 0, 0, INTCS } },
500}; 494};
501 495
502/* Priority is needed for INTCA to receive the INTCS interrupt */ 496/* Priority is needed for INTCA to receive the INTCS interrupt */
@@ -561,6 +555,7 @@ static void __iomem *intcs_ffd5;
561void __init sh7372_init_irq(void) 555void __init sh7372_init_irq(void)
562{ 556{
563 void __iomem *intevtsa; 557 void __iomem *intevtsa;
558 int n;
564 559
565 intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE); 560 intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE);
566 intevtsa = intcs_ffd2 + 0x100; 561 intevtsa = intcs_ffd2 + 0x100;
@@ -571,9 +566,19 @@ void __init sh7372_init_irq(void)
571 register_intc_controller(&intca_irq_pins_hi_desc); 566 register_intc_controller(&intca_irq_pins_hi_desc);
572 register_intc_controller(&intcs_desc); 567 register_intc_controller(&intcs_desc);
573 568
569 /* setup dummy cascade chip for INTCS */
570 n = evt2irq(0xf80);
571 irq_alloc_desc_at(n, numa_node_id());
572 irq_set_chip_and_handler_name(n, &dummy_irq_chip,
573 handle_level_irq, "level");
574 set_irq_flags(n, IRQF_VALID); /* yuck */
575
574 /* demux using INTEVTSA */ 576 /* demux using INTEVTSA */
575 irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa); 577 irq_set_handler_data(n, (void *)intevtsa);
576 irq_set_chained_handler(evt2irq(0xf80), intcs_demux); 578 irq_set_chained_handler(n, intcs_demux);
579
580 /* unmask INTCS in INTAMASK */
581 iowrite16(0, intcs_ffd2 + 0x104);
577} 582}
578 583
579static unsigned short ffd2[0x200]; 584static unsigned short ffd2[0x200];