aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-shmobile/clock-sh7372.c
diff options
context:
space:
mode:
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2012-10-30 23:07:25 -0400
committerSimon Horman <horms@verge.net.au>2012-11-08 01:21:34 -0500
commit9ee8008e99b36fff6a06c41a76594dd1b9a0677a (patch)
tree5911821f1d4fc749987b41b4daa5cc82dd206440 /arch/arm/mach-shmobile/clock-sh7372.c
parent9d626eccb1de90a310f3fb9bc5e8803706be1a95 (diff)
ARM: shmobile: sh7372: sh7372_fsidivX_clk become non-global
Not only sh7372 but also many Renesas chip has FSI-DIV clock, and we can share its sh_clk_ops. To support common FSI-DIV clock, sh7372_fsidivX_clk becomes non-global by this patch. This is preparation for FSI DT support. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-sh7372.c')
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 430a90ffa120..18dcff7551c0 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -481,7 +481,7 @@ static struct clk_mapping fsidiva_clk_mapping = {
481 .len = 8, 481 .len = 8,
482}; 482};
483 483
484struct clk sh7372_fsidiva_clk = { 484static struct clk fsidiva_clk = {
485 .ops = &fsidiv_clk_ops, 485 .ops = &fsidiv_clk_ops,
486 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */ 486 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
487 .mapping = &fsidiva_clk_mapping, 487 .mapping = &fsidiva_clk_mapping,
@@ -492,15 +492,15 @@ static struct clk_mapping fsidivb_clk_mapping = {
492 .len = 8, 492 .len = 8,
493}; 493};
494 494
495struct clk sh7372_fsidivb_clk = { 495static struct clk fsidivb_clk = {
496 .ops = &fsidiv_clk_ops, 496 .ops = &fsidiv_clk_ops,
497 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */ 497 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
498 .mapping = &fsidivb_clk_mapping, 498 .mapping = &fsidivb_clk_mapping,
499}; 499};
500 500
501static struct clk *late_main_clks[] = { 501static struct clk *late_main_clks[] = {
502 &sh7372_fsidiva_clk, 502 &fsidiva_clk,
503 &sh7372_fsidivb_clk, 503 &fsidivb_clk,
504}; 504};
505 505
506enum { MSTP001, MSTP000, 506enum { MSTP001, MSTP000,
@@ -583,6 +583,8 @@ static struct clk_lookup lookups[] = {
583 CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), 583 CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
584 CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), 584 CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
585 CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk), 585 CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk),
586 CLKDEV_CON_ID("fsidiva", &fsidiva_clk),
587 CLKDEV_CON_ID("fsidivb", &fsidivb_clk),
586 588
587 /* DIV4 clocks */ 589 /* DIV4 clocks */
588 CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), 590 CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),