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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2013-12-08 15:50:36 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-12-12 07:44:05 -0500
commit893c3f0bc55e749124f14b02eee9510147fefd90 (patch)
treecbefab58b37f055a9160f165a1c6b496f8f15406 /arch/arm/mach-shmobile/clock-r8a7791.c
parent02d39132e75410633c637be006b9b772a6116da3 (diff)
ARM: shmobile: r8a7791: add Ether clock
Add support for R8A7791 Ether clock. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-r8a7791.c')
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7791.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index ff2d60d55bd5..f5461262ee25 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -122,6 +122,7 @@ static struct clk *main_clks[] = {
122 122
123/* MSTP */ 123/* MSTP */
124enum { 124enum {
125 MSTP813,
125 MSTP726, MSTP724, MSTP723, MSTP721, MSTP720, 126 MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
126 MSTP719, MSTP718, MSTP715, MSTP714, 127 MSTP719, MSTP718, MSTP715, MSTP714,
127 MSTP522, 128 MSTP522,
@@ -132,6 +133,7 @@ enum {
132}; 133};
133 134
134static struct clk mstp_clks[MSTP_NR] = { 135static struct clk mstp_clks[MSTP_NR] = {
136 [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
135 [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ 137 [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
136 [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */ 138 [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
137 [MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */ 139 [MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
@@ -192,6 +194,7 @@ static struct clk_lookup lookups[] = {
192 CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), 194 CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
193 CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), 195 CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
194 CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), 196 CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
197 CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */
195}; 198};
196 199
197#define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ 200#define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \