diff options
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2012-10-10 22:56:42 -0400 |
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committer | Simon Horman <horms@verge.net.au> | 2012-11-05 23:47:23 -0500 |
commit | 16c40abcfa8738da9aa0e25b407bbf0dcbdd5e13 (patch) | |
tree | 74ace375b1df04f6f2339e7e8812d8f839407e9f /arch/arm/mach-shmobile/clock-r8a7779.c | |
parent | f92246e61a4e1a2afae0701c557f65e6a8ecfe3d (diff) |
ARM: shmobile: r8a7779: add I2C clock support
This patch is required from R-Car I2C driver
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-r8a7779.c')
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7779.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 90d717b95aa3..24f5a84797ea 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c | |||
@@ -87,7 +87,8 @@ static struct clk div4_clks[DIV4_NR] = { | |||
87 | }; | 87 | }; |
88 | 88 | ||
89 | enum { MSTP323, MSTP322, MSTP321, MSTP320, | 89 | enum { MSTP323, MSTP322, MSTP321, MSTP320, |
90 | MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, | 90 | MSTP030, |
91 | MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, | ||
91 | MSTP016, MSTP015, MSTP014, | 92 | MSTP016, MSTP015, MSTP014, |
92 | MSTP007, | 93 | MSTP007, |
93 | MSTP_NR }; | 94 | MSTP_NR }; |
@@ -97,6 +98,10 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
97 | [MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0), /* SDHI1 */ | 98 | [MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0), /* SDHI1 */ |
98 | [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */ | 99 | [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */ |
99 | [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */ | 100 | [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */ |
101 | [MSTP030] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 30, 0), /* I2C0 */ | ||
102 | [MSTP029] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 29, 0), /* I2C1 */ | ||
103 | [MSTP028] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 28, 0), /* I2C2 */ | ||
104 | [MSTP027] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 27, 0), /* I2C3 */ | ||
100 | [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), /* SCIF0 */ | 105 | [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), /* SCIF0 */ |
101 | [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), /* SCIF1 */ | 106 | [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), /* SCIF1 */ |
102 | [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), /* SCIF2 */ | 107 | [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), /* SCIF2 */ |
@@ -150,6 +155,10 @@ static struct clk_lookup lookups[] = { | |||
150 | /* MSTP32 clocks */ | 155 | /* MSTP32 clocks */ |
151 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ | 156 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ |
152 | CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */ | 157 | CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */ |
158 | CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */ | ||
159 | CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */ | ||
160 | CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */ | ||
161 | CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */ | ||
153 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ | 162 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ |
154 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ | 163 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ |
155 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ | 164 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ |