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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-14 18:11:19 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-14 18:11:19 -0500 |
commit | 51be08419dc86c72486ac556aa39bc01026a403d (patch) | |
tree | 50ac35ac89f207d2a732b67eb2f1e9b671e5c064 /arch/arm/mach-shmobile/board-ag5evm.c | |
parent | ec8013beddd717d1740cfefb1a9b900deef85462 (diff) | |
parent | f787f32e67e00b072f46b2ae3c454d2c0a1fcdb7 (diff) |
Merge branch 'fbdev-next' of git://github.com/schandinat/linux-2.6
* 'fbdev-next' of git://github.com/schandinat/linux-2.6: (175 commits)
module_param: make bool parameters really bool (drivers/video/i810)
Revert "atmel_lcdfb: Adjust HFP calculation so it matches the manual."
OMAPDSS: HDMI: Disable DDC internal pull up
OMAPDSS: HDMI: Move duplicate code from boardfile
OMAPDSS: add OrtusTech COM43H4M10XTC display support
OMAP: DSS2: Support for UMSH-8173MD TFT panel
ASoC: OMAP: HDMI: Move HDMI codec trigger function to generic HDMI driver
OMAPDSS: HDMI: Create function to enable HDMI audio
ASoC: OMAP: HDMI: Correct signature of ASoC functions
ASoC: OMAP: HDMI: Introduce driver data for audio codec
grvga: fix section mismatch warnings
video: s3c-fb: Don't keep device runtime active when open
video: s3c-fb: Hold runtime PM references when touching registers
video: s3c-fb: Take a runtime PM reference when unblanked
video: s3c-fb: Disable runtime PM in error paths from probe
video: s3c-fb: Use s3c_fb_enable() to enable the framebuffer
video: s3c-fb: Make runtime PM functional again
drivers/video: fsl-diu-fb: merge fsl_diu_alloc() into map_video_memory()
drivers/video: fsl-diu-fb: add default platform ops functions
drivers/video: fsl-diu-fb: remove broken reference count enabling the display
...
Diffstat (limited to 'arch/arm/mach-shmobile/board-ag5evm.c')
-rw-r--r-- | arch/arm/mach-shmobile/board-ag5evm.c | 43 |
1 files changed, 36 insertions, 7 deletions
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index a4e6ca04e319..eff8a96c75ee 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -271,7 +271,7 @@ static struct sh_mobile_lcdc_info lcdc0_info = { | |||
271 | .flags = LCDC_FLAGS_DWPOL, | 271 | .flags = LCDC_FLAGS_DWPOL, |
272 | .lcd_size_cfg.width = 44, | 272 | .lcd_size_cfg.width = 44, |
273 | .lcd_size_cfg.height = 79, | 273 | .lcd_size_cfg.height = 79, |
274 | .bpp = 16, | 274 | .fourcc = V4L2_PIX_FMT_RGB565, |
275 | .lcd_cfg = lcdc0_modes, | 275 | .lcd_cfg = lcdc0_modes, |
276 | .num_cfg = ARRAY_SIZE(lcdc0_modes), | 276 | .num_cfg = ARRAY_SIZE(lcdc0_modes), |
277 | .board_cfg = { | 277 | .board_cfg = { |
@@ -321,12 +321,46 @@ static struct resource mipidsi0_resources[] = { | |||
321 | }, | 321 | }, |
322 | }; | 322 | }; |
323 | 323 | ||
324 | #define DSI0PHYCR 0xe615006c | ||
325 | static int sh_mipi_set_dot_clock(struct platform_device *pdev, | ||
326 | void __iomem *base, | ||
327 | int enable) | ||
328 | { | ||
329 | struct clk *pck; | ||
330 | int ret; | ||
331 | |||
332 | pck = clk_get(&pdev->dev, "dsip_clk"); | ||
333 | if (IS_ERR(pck)) { | ||
334 | ret = PTR_ERR(pck); | ||
335 | goto sh_mipi_set_dot_clock_pck_err; | ||
336 | } | ||
337 | |||
338 | if (enable) { | ||
339 | clk_set_rate(pck, clk_round_rate(pck, 24000000)); | ||
340 | __raw_writel(0x2a809010, DSI0PHYCR); | ||
341 | clk_enable(pck); | ||
342 | } else { | ||
343 | clk_disable(pck); | ||
344 | } | ||
345 | |||
346 | ret = 0; | ||
347 | |||
348 | clk_put(pck); | ||
349 | |||
350 | sh_mipi_set_dot_clock_pck_err: | ||
351 | return ret; | ||
352 | } | ||
353 | |||
324 | static struct sh_mipi_dsi_info mipidsi0_info = { | 354 | static struct sh_mipi_dsi_info mipidsi0_info = { |
325 | .data_format = MIPI_RGB888, | 355 | .data_format = MIPI_RGB888, |
326 | .lcd_chan = &lcdc0_info.ch[0], | 356 | .lcd_chan = &lcdc0_info.ch[0], |
357 | .lane = 2, | ||
327 | .vsynw_offset = 20, | 358 | .vsynw_offset = 20, |
328 | .clksrc = 1, | 359 | .clksrc = 1, |
329 | .flags = SH_MIPI_DSI_HSABM, | 360 | .flags = SH_MIPI_DSI_HSABM | |
361 | SH_MIPI_DSI_SYNC_PULSES_MODE | | ||
362 | SH_MIPI_DSI_HSbyteCLK, | ||
363 | .set_dot_clock = sh_mipi_set_dot_clock, | ||
330 | }; | 364 | }; |
331 | 365 | ||
332 | static struct platform_device mipidsi0_device = { | 366 | static struct platform_device mipidsi0_device = { |
@@ -472,8 +506,6 @@ static void __init ag5evm_map_io(void) | |||
472 | shmobile_setup_console(); | 506 | shmobile_setup_console(); |
473 | } | 507 | } |
474 | 508 | ||
475 | #define DSI0PHYCR 0xe615006c | ||
476 | |||
477 | static void __init ag5evm_init(void) | 509 | static void __init ag5evm_init(void) |
478 | { | 510 | { |
479 | sh73a0_pinmux_init(); | 511 | sh73a0_pinmux_init(); |
@@ -554,9 +586,6 @@ static void __init ag5evm_init(void) | |||
554 | gpio_direction_output(GPIO_PORT235, 0); | 586 | gpio_direction_output(GPIO_PORT235, 0); |
555 | lcd_backlight_reset(); | 587 | lcd_backlight_reset(); |
556 | 588 | ||
557 | /* MIPI-DSI clock setup */ | ||
558 | __raw_writel(0x2a809010, DSI0PHYCR); | ||
559 | |||
560 | /* enable SDHI0 on CN15 [SD I/F] */ | 589 | /* enable SDHI0 on CN15 [SD I/F] */ |
561 | gpio_request(GPIO_FN_SDHICD0, NULL); | 590 | gpio_request(GPIO_FN_SDHICD0, NULL); |
562 | gpio_request(GPIO_FN_SDHIWP0, NULL); | 591 | gpio_request(GPIO_FN_SDHIWP0, NULL); |