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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-05-08 11:14:40 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-05-23 13:04:48 -0400
commit1ba4c3cb171d9899a3eaa2e45fa171e0704c1377 (patch)
tree00626fd9e34e3528331af1996a4bd6a13b055170 /arch/arm/mach-sa1100
parent111c7751e3f86bdfe7256741281709afe22bba71 (diff)
ARM: update sa1100 to reflect PXA updates
Update sa1100 clockevents code to reflect what its later derivative does with clockevents_calc_mult_shift(). Use OSSR_M* constants too. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r--arch/arm/mach-sa1100/time.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index ae4f3d80416f..51c05292d145 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -92,7 +92,6 @@ sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
92static struct clock_event_device ckevt_sa1100_osmr0 = { 92static struct clock_event_device ckevt_sa1100_osmr0 = {
93 .name = "osmr0", 93 .name = "osmr0",
94 .features = CLOCK_EVT_FEAT_ONESHOT, 94 .features = CLOCK_EVT_FEAT_ONESHOT,
95 .shift = 32,
96 .rating = 200, 95 .rating = 200,
97 .set_next_event = sa1100_osmr0_set_next_event, 96 .set_next_event = sa1100_osmr0_set_next_event,
98 .set_mode = sa1100_osmr0_set_mode, 97 .set_mode = sa1100_osmr0_set_mode,
@@ -120,14 +119,13 @@ static struct irqaction sa1100_timer_irq = {
120 119
121static void __init sa1100_timer_init(void) 120static void __init sa1100_timer_init(void)
122{ 121{
123 OIER = 0; /* disable any timer interrupts */ 122 OIER = 0;
124 OSSR = 0xf; /* clear status on all timers */ 123 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
125 124
126 init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32, 125 init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32,
127 3686400, SC_MULT, SC_SHIFT); 126 3686400, SC_MULT, SC_SHIFT);
128 127
129 ckevt_sa1100_osmr0.mult = 128 clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
130 div_sc(3686400, NSEC_PER_SEC, ckevt_sa1100_osmr0.shift);
131 ckevt_sa1100_osmr0.max_delta_ns = 129 ckevt_sa1100_osmr0.max_delta_ns =
132 clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0); 130 clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
133 ckevt_sa1100_osmr0.min_delta_ns = 131 ckevt_sa1100_osmr0.min_delta_ns =