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authorLinus Torvalds <torvalds@linux-foundation.org>2014-04-05 16:51:19 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-04-05 16:51:19 -0400
commitdfc25e4503aef6b82a1de4a0fbe19aafa8648fbe (patch)
tree0a4f3a07e2286918298e635186e42726f4658cbd /arch/arm/mach-sa1100
parent9f800363bb0ea459e15bef0928a72c88d374e489 (diff)
parent8f881c67368f82d0e20e1072b50b21132cc2440d (diff)
Merge tag 'cleanup-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Arnd Bergmann: "These cleanup patches are mainly move stuff around and should all be harmless. They are mainly split out so that other branches can be based on top to avoid conflicts. Notable changes are: - We finally remove all mach/timex.h, after CLOCK_TICK_RATE is no longer used (Uwe Kleine-König) - The Qualcomm MSM platform is split out into legacy mach-msm and new-style mach-qcom, to allow easier maintainance of the new hardware support without regressions (Kumar Gala) - A rework of some of the Kconfig logic to simplify multiplatform support (Rob Herring) - Samsung Exynos gets closer to supporting multiplatform (Sachin Kamat and others) - mach-bcm3528 gets merged into mach-bcm (Stephen Warren) - at91 gains some common clock framework support (Alexandre Belloni, Jean-Jacques Hiblot and other French people)" * tag 'cleanup-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (89 commits) ARM: hisi: select HAVE_ARM_SCU only for SMP ARM: efm32: allow uncompress debug output ARM: prima2: build reset code standalone ARM: at91: add PWM clock ARM: at91: move sam9261 SoC to common clk ARM: at91: prepare common clk transition for sam9261 SoC ARM: at91: updated the at91_dt_defconfig with support for the ADS7846 ARM: at91: dt: sam9261: Device Tree support for the at91sam9261ek ARM: at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs ARM: at91: dt: Add at91sam9261 dt SoC support ARM: at91: switch sam9rl to common clock framework ARM: at91/dt: define main clk frequency of at91sam9rlek ARM: at91/dt: define at91sam9rl clocks ARM: at91: prepare common clk transition for sam9rl SoCs ARM: at91: prepare sam9 dt boards transition to common clk ARM: at91: dt: sam9rl: Device Tree for the at91sam9rlek ARM: at91/defconfig: Add the sam9rl to the list of DT-enabled SOCs ARM: at91: Add at91sam9rl DT SoC support ARM: at91: prepare at91sam9rl DT transition ARM: at91/defconfig: refresh at91sam9260_9g20_defconfig ...
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r--arch/arm/mach-sa1100/include/mach/timex.h12
-rw-r--r--arch/arm/mach-sa1100/time.c8
2 files changed, 6 insertions, 14 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/timex.h b/arch/arm/mach-sa1100/include/mach/timex.h
deleted file mode 100644
index 7a5d017b58b3..000000000000
--- a/arch/arm/mach-sa1100/include/mach/timex.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/*
2 * arch/arm/mach-sa1100/include/mach/timex.h
3 *
4 * SA1100 architecture timex specifications
5 *
6 * Copyright (C) 1998
7 */
8
9/*
10 * SA1100 timer
11 */
12#define CLOCK_TICK_RATE 3686400
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 4852c08cb526..1dea6cfafb31 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -9,6 +9,7 @@
9 * 9 *
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/kernel.h>
12#include <linux/errno.h> 13#include <linux/errno.h>
13#include <linux/interrupt.h> 14#include <linux/interrupt.h>
14#include <linux/irq.h> 15#include <linux/irq.h>
@@ -20,6 +21,9 @@
20#include <mach/hardware.h> 21#include <mach/hardware.h>
21#include <mach/irqs.h> 22#include <mach/irqs.h>
22 23
24#define SA1100_CLOCK_FREQ 3686400
25#define SA1100_LATCH DIV_ROUND_CLOSEST(SA1100_CLOCK_FREQ, HZ)
26
23static u64 notrace sa1100_read_sched_clock(void) 27static u64 notrace sa1100_read_sched_clock(void)
24{ 28{
25 return readl_relaxed(OSCR); 29 return readl_relaxed(OSCR);
@@ -93,7 +97,7 @@ static void sa1100_timer_resume(struct clock_event_device *cedev)
93 /* 97 /*
94 * OSMR0 is the system timer: make sure OSCR is sufficiently behind 98 * OSMR0 is the system timer: make sure OSCR is sufficiently behind
95 */ 99 */
96 writel_relaxed(OSMR0 - LATCH, OSCR); 100 writel_relaxed(OSMR0 - SA1100_LATCH, OSCR);
97} 101}
98#else 102#else
99#define sa1100_timer_suspend NULL 103#define sa1100_timer_suspend NULL
@@ -128,7 +132,7 @@ void __init sa1100_timer_init(void)
128 132
129 setup_irq(IRQ_OST0, &sa1100_timer_irq); 133 setup_irq(IRQ_OST0, &sa1100_timer_irq);
130 134
131 clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, 135 clocksource_mmio_init(OSCR, "oscr", SA1100_CLOCK_FREQ, 200, 32,
132 clocksource_mmio_readl_up); 136 clocksource_mmio_readl_up);
133 clockevents_config_and_register(&ckevt_sa1100_osmr0, 3686400, 137 clockevents_config_and_register(&ckevt_sa1100_osmr0, 3686400,
134 MIN_OSCR_DELTA * 2, 0x7fffffff); 138 MIN_OSCR_DELTA * 2, 0x7fffffff);