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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-07-02 18:04:12 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-07-02 18:04:12 -0400 |
commit | a8c4c20dfa8b28a3c99e33c639d9c2ea5657741e (patch) | |
tree | 887b64d29b5a46d9ab2ca1267d8a2f05b5845561 /arch/arm/mach-sa1100 | |
parent | 168d04b3b4de7723eb73b3cffc9cb75224e0f393 (diff) | |
parent | 2dc7667b9d0674db6572723356fe3857031101a4 (diff) |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits)
[ARM] 3541/2: workaround for PXA27x erratum E7
[ARM] nommu: provide a way for correct control register value selection
[ARM] 3705/1: add supersection support to ioremap()
[ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure
[ARM] 3706/2: ep93xx: add cirrus logic edb9315a support
[ARM] 3704/1: format IOP Kconfig with tabs, create more consistency
[ARM] 3703/1: Add help description for ARCH_EP80219
[ARM] 3678/1: MMC: Make OMAP MMC work
[ARM] 3677/1: OMAP: Update H2 defconfig
[ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1
[ARM] Add section support to ioremap
[ARM] Fix sa11x0 SDRAM selection
[ARM] Set bit 4 on section mappings correctly depending on CPU
[ARM] 3666/1: TRIZEPS4 [1/5] core
ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring
ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE
ARM: OMAP: Update dmtimers
ARM: OMAP: Make clock variables static
ARM: OMAP: Fix GPMC compilation when DEBUG is defined
ARM: OMAP: Mux updates for external DMA and GPIO
...
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r-- | arch/arm/mach-sa1100/cpu-sa1110.c | 131 |
1 files changed, 76 insertions, 55 deletions
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c index 04c94ab6c18b..639597729932 100644 --- a/arch/arm/mach-sa1100/cpu-sa1110.c +++ b/arch/arm/mach-sa1100/cpu-sa1110.c | |||
@@ -15,7 +15,10 @@ | |||
15 | * SDRAM reads (rev A0, B0, B1) | 15 | * SDRAM reads (rev A0, B0, B1) |
16 | * | 16 | * |
17 | * We ignore rev. A0 and B0 devices; I don't think they're worth supporting. | 17 | * We ignore rev. A0 and B0 devices; I don't think they're worth supporting. |
18 | * | ||
19 | * The SDRAM type can be passed on the command line as cpu_sa1110.sdram=type | ||
18 | */ | 20 | */ |
21 | #include <linux/moduleparam.h> | ||
19 | #include <linux/types.h> | 22 | #include <linux/types.h> |
20 | #include <linux/kernel.h> | 23 | #include <linux/kernel.h> |
21 | #include <linux/sched.h> | 24 | #include <linux/sched.h> |
@@ -35,6 +38,7 @@ | |||
35 | static struct cpufreq_driver sa1110_driver; | 38 | static struct cpufreq_driver sa1110_driver; |
36 | 39 | ||
37 | struct sdram_params { | 40 | struct sdram_params { |
41 | const char name[16]; | ||
38 | u_char rows; /* bits */ | 42 | u_char rows; /* bits */ |
39 | u_char cas_latency; /* cycles */ | 43 | u_char cas_latency; /* cycles */ |
40 | u_char tck; /* clock cycle time (ns) */ | 44 | u_char tck; /* clock cycle time (ns) */ |
@@ -50,54 +54,53 @@ struct sdram_info { | |||
50 | u_int mdcas[3]; | 54 | u_int mdcas[3]; |
51 | }; | 55 | }; |
52 | 56 | ||
53 | static struct sdram_params tc59sm716_cl2_params __initdata = { | 57 | static struct sdram_params sdram_tbl[] __initdata = { |
54 | .rows = 12, | 58 | { /* Toshiba TC59SM716 CL2 */ |
55 | .tck = 10, | 59 | .name = "TC59SM716-CL2", |
56 | .trcd = 20, | 60 | .rows = 12, |
57 | .trp = 20, | 61 | .tck = 10, |
58 | .twr = 10, | 62 | .trcd = 20, |
59 | .refresh = 64000, | 63 | .trp = 20, |
60 | .cas_latency = 2, | 64 | .twr = 10, |
61 | }; | 65 | .refresh = 64000, |
62 | 66 | .cas_latency = 2, | |
63 | static struct sdram_params tc59sm716_cl3_params __initdata = { | 67 | }, { /* Toshiba TC59SM716 CL3 */ |
64 | .rows = 12, | 68 | .name = "TC59SM716-CL3", |
65 | .tck = 8, | 69 | .rows = 12, |
66 | .trcd = 20, | 70 | .tck = 8, |
67 | .trp = 20, | 71 | .trcd = 20, |
68 | .twr = 8, | 72 | .trp = 20, |
69 | .refresh = 64000, | 73 | .twr = 8, |
70 | .cas_latency = 3, | 74 | .refresh = 64000, |
71 | }; | 75 | .cas_latency = 3, |
72 | 76 | }, { /* Samsung K4S641632D TC75 */ | |
73 | static struct sdram_params samsung_k4s641632d_tc75 __initdata = { | 77 | .name = "K4S641632D", |
74 | .rows = 14, | 78 | .rows = 14, |
75 | .tck = 9, | 79 | .tck = 9, |
76 | .trcd = 27, | 80 | .trcd = 27, |
77 | .trp = 20, | 81 | .trp = 20, |
78 | .twr = 9, | 82 | .twr = 9, |
79 | .refresh = 64000, | 83 | .refresh = 64000, |
80 | .cas_latency = 3, | 84 | .cas_latency = 3, |
81 | }; | 85 | }, { /* Samsung KM416S4030CT */ |
82 | 86 | .name = "KM416S4030CT", | |
83 | static struct sdram_params samsung_km416s4030ct __initdata = { | 87 | .rows = 13, |
84 | .rows = 13, | 88 | .tck = 8, |
85 | .tck = 8, | 89 | .trcd = 24, /* 3 CLKs */ |
86 | .trcd = 24, /* 3 CLKs */ | 90 | .trp = 24, /* 3 CLKs */ |
87 | .trp = 24, /* 3 CLKs */ | 91 | .twr = 16, /* Trdl: 2 CLKs */ |
88 | .twr = 16, /* Trdl: 2 CLKs */ | 92 | .refresh = 64000, |
89 | .refresh = 64000, | 93 | .cas_latency = 3, |
90 | .cas_latency = 3, | 94 | }, { /* Winbond W982516AH75L CL3 */ |
91 | }; | 95 | .name = "W982516AH75L", |
92 | 96 | .rows = 16, | |
93 | static struct sdram_params wbond_w982516ah75l_cl3_params __initdata = { | 97 | .tck = 8, |
94 | .rows = 16, | 98 | .trcd = 20, |
95 | .tck = 8, | 99 | .trp = 20, |
96 | .trcd = 20, | 100 | .twr = 8, |
97 | .trp = 20, | 101 | .refresh = 64000, |
98 | .twr = 8, | 102 | .cas_latency = 3, |
99 | .refresh = 64000, | 103 | }, |
100 | .cas_latency = 3, | ||
101 | }; | 104 | }; |
102 | 105 | ||
103 | static struct sdram_params sdram_params; | 106 | static struct sdram_params sdram_params; |
@@ -336,19 +339,36 @@ static struct cpufreq_driver sa1110_driver = { | |||
336 | .name = "sa1110", | 339 | .name = "sa1110", |
337 | }; | 340 | }; |
338 | 341 | ||
342 | static struct sdram_params *sa1110_find_sdram(const char *name) | ||
343 | { | ||
344 | struct sdram_params *sdram; | ||
345 | |||
346 | for (sdram = sdram_tbl; sdram < sdram_tbl + ARRAY_SIZE(sdram_tbl); sdram++) | ||
347 | if (strcmp(name, sdram->name) == 0) | ||
348 | return sdram; | ||
349 | |||
350 | return NULL; | ||
351 | } | ||
352 | |||
353 | static char sdram_name[16]; | ||
354 | |||
339 | static int __init sa1110_clk_init(void) | 355 | static int __init sa1110_clk_init(void) |
340 | { | 356 | { |
341 | struct sdram_params *sdram = NULL; | 357 | struct sdram_params *sdram; |
358 | const char *name = sdram_name; | ||
342 | 359 | ||
343 | if (machine_is_assabet()) | 360 | if (!name[0]) { |
344 | sdram = &tc59sm716_cl3_params; | 361 | if (machine_is_assabet()) |
362 | name = "TC59SM716-CL3"; | ||
345 | 363 | ||
346 | if (machine_is_pt_system3()) | 364 | if (machine_is_pt_system3()) |
347 | sdram = &samsung_k4s641632d_tc75; | 365 | name = "K4S641632D"; |
348 | 366 | ||
349 | if (machine_is_h3100()) | 367 | if (machine_is_h3100()) |
350 | sdram = &samsung_km416s4030ct; | 368 | name = "KM416S4030CT"; |
369 | } | ||
351 | 370 | ||
371 | sdram = sa1110_find_sdram(name); | ||
352 | if (sdram) { | 372 | if (sdram) { |
353 | printk(KERN_DEBUG "SDRAM: tck: %d trcd: %d trp: %d" | 373 | printk(KERN_DEBUG "SDRAM: tck: %d trcd: %d trp: %d" |
354 | " twr: %d refresh: %d cas_latency: %d\n", | 374 | " twr: %d refresh: %d cas_latency: %d\n", |
@@ -363,4 +383,5 @@ static int __init sa1110_clk_init(void) | |||
363 | return 0; | 383 | return 0; |
364 | } | 384 | } |
365 | 385 | ||
386 | module_param_string(sdram, sdram_name, sizeof(sdram_name), 0); | ||
366 | arch_initcall(sa1110_clk_init); | 387 | arch_initcall(sa1110_clk_init); |