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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-01-05 13:09:03 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-01-05 13:09:03 -0500
commit58daf18cdcab550262a5f4681e1f1e073e21965a (patch)
tree2096324b947761a567dd451f33664f17ee1de2cd /arch/arm/mach-sa1100
parentaa312be1987d43216e72ffce42bccf6bf81f62ed (diff)
parent0af85dda39d9b673aca8c0ebae004ea70f3efc93 (diff)
Merge branch 'clksrc' into devel
Conflicts: arch/arm/mach-vexpress/v2m.c arch/arm/plat-omap/counter_32k.c arch/arm/plat-versatile/Makefile
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r--arch/arm/mach-sa1100/generic.c23
-rw-r--r--arch/arm/mach-sa1100/time.c36
2 files changed, 31 insertions, 28 deletions
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 3555d616774c..59d14f0fdcf8 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -16,9 +16,7 @@
16#include <linux/pm.h> 16#include <linux/pm.h>
17#include <linux/cpufreq.h> 17#include <linux/cpufreq.h>
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <linux/sched.h> /* just for sched_clock() - funny that */
20#include <linux/platform_device.h> 19#include <linux/platform_device.h>
21#include <linux/cnt32_to_63.h>
22 20
23#include <asm/div64.h> 21#include <asm/div64.h>
24#include <mach/hardware.h> 22#include <mach/hardware.h>
@@ -110,27 +108,6 @@ unsigned int sa11x0_getspeed(unsigned int cpu)
110} 108}
111 109
112/* 110/*
113 * This is the SA11x0 sched_clock implementation. This has
114 * a resolution of 271ns, and a maximum value of 32025597s (370 days).
115 *
116 * The return value is guaranteed to be monotonic in that range as
117 * long as there is always less than 582 seconds between successive
118 * calls to this function.
119 *
120 * ( * 1E9 / 3686400 => * 78125 / 288)
121 */
122unsigned long long sched_clock(void)
123{
124 unsigned long long v = cnt32_to_63(OSCR);
125
126 /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
127 v *= 78125<<1;
128 do_div(v, 288<<1);
129
130 return v;
131}
132
133/*
134 * Default power-off for SA1100 111 * Default power-off for SA1100
135 */ 112 */
136static void sa1100_power_off(void) 113static void sa1100_power_off(void)
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 74b6e0e570b6..ae4f3d80416f 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -12,12 +12,39 @@
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/sched.h> /* just for sched_clock() - funny that */
15#include <linux/timex.h> 16#include <linux/timex.h>
16#include <linux/clockchips.h> 17#include <linux/clockchips.h>
17 18
18#include <asm/mach/time.h> 19#include <asm/mach/time.h>
20#include <asm/sched_clock.h>
19#include <mach/hardware.h> 21#include <mach/hardware.h>
20 22
23/*
24 * This is the SA11x0 sched_clock implementation.
25 */
26static DEFINE_CLOCK_DATA(cd);
27
28/*
29 * Constants generated by clocks_calc_mult_shift(m, s, 3.6864MHz,
30 * NSEC_PER_SEC, 60).
31 * This gives a resolution of about 271ns and a wrap period of about 19min.
32 */
33#define SC_MULT 2275555556u
34#define SC_SHIFT 23
35
36unsigned long long notrace sched_clock(void)
37{
38 u32 cyc = OSCR;
39 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
40}
41
42static void notrace sa1100_update_sched_clock(void)
43{
44 u32 cyc = OSCR;
45 update_sched_clock(&cd, cyc, (u32)~0);
46}
47
21#define MIN_OSCR_DELTA 2 48#define MIN_OSCR_DELTA 2
22 49
23static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id) 50static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)
@@ -81,7 +108,6 @@ static struct clocksource cksrc_sa1100_oscr = {
81 .rating = 200, 108 .rating = 200,
82 .read = sa1100_read_oscr, 109 .read = sa1100_read_oscr,
83 .mask = CLOCKSOURCE_MASK(32), 110 .mask = CLOCKSOURCE_MASK(32),
84 .shift = 20,
85 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 111 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
86}; 112};
87 113
@@ -97,6 +123,9 @@ static void __init sa1100_timer_init(void)
97 OIER = 0; /* disable any timer interrupts */ 123 OIER = 0; /* disable any timer interrupts */
98 OSSR = 0xf; /* clear status on all timers */ 124 OSSR = 0xf; /* clear status on all timers */
99 125
126 init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32,
127 3686400, SC_MULT, SC_SHIFT);
128
100 ckevt_sa1100_osmr0.mult = 129 ckevt_sa1100_osmr0.mult =
101 div_sc(3686400, NSEC_PER_SEC, ckevt_sa1100_osmr0.shift); 130 div_sc(3686400, NSEC_PER_SEC, ckevt_sa1100_osmr0.shift);
102 ckevt_sa1100_osmr0.max_delta_ns = 131 ckevt_sa1100_osmr0.max_delta_ns =
@@ -105,12 +134,9 @@ static void __init sa1100_timer_init(void)
105 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1; 134 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
106 ckevt_sa1100_osmr0.cpumask = cpumask_of(0); 135 ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
107 136
108 cksrc_sa1100_oscr.mult =
109 clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift);
110
111 setup_irq(IRQ_OST0, &sa1100_timer_irq); 137 setup_irq(IRQ_OST0, &sa1100_timer_irq);
112 138
113 clocksource_register(&cksrc_sa1100_oscr); 139 clocksource_register_hz(&cksrc_sa1100_oscr, CLOCK_TICK_RATE);
114 clockevents_register_device(&ckevt_sa1100_osmr0); 140 clockevents_register_device(&ckevt_sa1100_osmr0);
115} 141}
116 142