PCMCIA: sa11x0: nanoengine: convert to use new irq/gpio management

Convert Nanoengine socket driver to use the new irq/gpio management.
This is slightly more involved because we have to touch the private
platform header file to modify the GPIO bitmasks to be GPIO numbers.

Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 4 insertions, 4 deletions

diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h
index 14f8382d0665..ad24c6c37402 100644
--- a/arch/arm/mach-sa1100/include/mach/nanoengine.h
+++ b/arch/arm/mach-sa1100/include/mach/nanoengine.h
@@ -16,10 +16,10 @@
 
 #include <mach/irqs.h>
 
-#define GPIO_PC_READY0  GPIO_GPIO(11) /* ready for socket 0 (active high)*/
-#define GPIO_PC_READY1  GPIO_GPIO(12) /* ready for socket 1 (active high) */
-#define GPIO_PC_CD0     GPIO_GPIO(13) /* detect for socket 0 (active low) */
-#define GPIO_PC_CD1     GPIO_GPIO(14) /* detect for socket 1 (active low) */
+#define GPIO_PC_READY0  11 /* ready for socket 0 (active high)*/
+#define GPIO_PC_READY1  12 /* ready for socket 1 (active high) */
+#define GPIO_PC_CD0     13 /* detect for socket 0 (active low) */
+#define GPIO_PC_CD1     14 /* detect for socket 1 (active low) */
 #define GPIO_PC_RESET0  GPIO_GPIO(15) /* reset socket 0 */
 #define GPIO_PC_RESET1  GPIO_GPIO(16) /* reset socket 1 */