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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-01-05 08:24:33 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-01-05 08:24:33 -0500
commit2e0e943436912ffe0848ece58167edfe754edb96 (patch)
treeb91919095c74742fa06e2105db6d859bee39b2b4 /arch/arm/mach-sa1100
parenta32737e1ca650504f172292dd344eb64c02311f3 (diff)
parentef3a0bf5bfadbace156fa2a3b9c753df2de41df2 (diff)
Merge branch 'devel-stable' into for-linus
Conflicts: arch/arm/kernel/setup.c arch/arm/mach-shmobile/board-kota2.c
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r--arch/arm/mach-sa1100/include/mach/system.h2
-rw-r--r--arch/arm/mach-sa1100/include/mach/vmalloc.h4
-rw-r--r--arch/arm/mach-sa1100/time.c28
3 files changed, 4 insertions, 30 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h
index ba9da9f7f183..345d35b7450c 100644
--- a/arch/arm/mach-sa1100/include/mach/system.h
+++ b/arch/arm/mach-sa1100/include/mach/system.h
@@ -14,7 +14,7 @@ static inline void arch_reset(char mode, const char *cmd)
14{ 14{
15 if (mode == 's') { 15 if (mode == 's') {
16 /* Jump into ROM at address 0 */ 16 /* Jump into ROM at address 0 */
17 cpu_reset(0); 17 soft_restart(0);
18 } else { 18 } else {
19 /* Use on-chip reset capability */ 19 /* Use on-chip reset capability */
20 RSRR = RSRR_SWR; 20 RSRR = RSRR_SWR;
diff --git a/arch/arm/mach-sa1100/include/mach/vmalloc.h b/arch/arm/mach-sa1100/include/mach/vmalloc.h
deleted file mode 100644
index b3d002398480..000000000000
--- a/arch/arm/mach-sa1100/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
1/*
2 * arch/arm/mach-sa1100/include/mach/vmalloc.h
3 */
4#define VMALLOC_END (0xe8000000UL)
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index fa6602491d54..69e33535dee6 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -12,7 +12,6 @@
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/sched.h> /* just for sched_clock() - funny that */
16#include <linux/timex.h> 15#include <linux/timex.h>
17#include <linux/clockchips.h> 16#include <linux/clockchips.h>
18 17
@@ -20,29 +19,9 @@
20#include <asm/sched_clock.h> 19#include <asm/sched_clock.h>
21#include <mach/hardware.h> 20#include <mach/hardware.h>
22 21
23/* 22static u32 notrace sa1100_read_sched_clock(void)
24 * This is the SA11x0 sched_clock implementation.
25 */
26static DEFINE_CLOCK_DATA(cd);
27
28/*
29 * Constants generated by clocks_calc_mult_shift(m, s, 3.6864MHz,
30 * NSEC_PER_SEC, 60).
31 * This gives a resolution of about 271ns and a wrap period of about 19min.
32 */
33#define SC_MULT 2275555556u
34#define SC_SHIFT 23
35
36unsigned long long notrace sched_clock(void)
37{
38 u32 cyc = OSCR;
39 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
40}
41
42static void notrace sa1100_update_sched_clock(void)
43{ 23{
44 u32 cyc = OSCR; 24 return OSCR;
45 update_sched_clock(&cd, cyc, (u32)~0);
46} 25}
47 26
48#define MIN_OSCR_DELTA 2 27#define MIN_OSCR_DELTA 2
@@ -109,8 +88,7 @@ static void __init sa1100_timer_init(void)
109 OIER = 0; 88 OIER = 0;
110 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; 89 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
111 90
112 init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32, 91 setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
113 3686400, SC_MULT, SC_SHIFT);
114 92
115 clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4); 93 clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
116 ckevt_sa1100_osmr0.max_delta_ns = 94 ckevt_sa1100_osmr0.max_delta_ns =