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authorSimon Arlott <simon@fire.lp0.eu>2007-05-11 15:40:30 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-20 15:10:32 -0400
commit6cbdc8c5357276307a77deeada3f04626ff17da6 (patch)
treee0a4190d816fa4efb6ddb331b859bf0d5eb9c1a3 /arch/arm/mach-sa1100
parentfc432e1952a3899ce35e84b417e5d60f74cb901b (diff)
[ARM] spelling fixes
Spelling fixes in arch/arm/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r--arch/arm/mach-sa1100/time.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 416e277054c2..29cb0c1604ab 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -25,7 +25,7 @@ static unsigned long __init sa1100_get_rtc_time(void)
25{ 25{
26 /* 26 /*
27 * According to the manual we should be able to let RTTR be zero 27 * According to the manual we should be able to let RTTR be zero
28 * and then a default diviser for a 32.768KHz clock is used. 28 * and then a default divisor for a 32.768KHz clock is used.
29 * Apparently this doesn't work, at least for my SA1110 rev 5. 29 * Apparently this doesn't work, at least for my SA1110 rev 5.
30 * If the clock divider is uninitialized then reset it to the 30 * If the clock divider is uninitialized then reset it to the
31 * default value to get the 1Hz clock. 31 * default value to get the 1Hz clock.