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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-08-10 13:08:10 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-09-01 07:06:23 -0400
commit0ba8b9b273c45dd23f60ff700e265a0069b33758 (patch)
treecb6aef90464889a27215cf9b7204c11b12e7c628 /arch/arm/mach-sa1100/include
parentb8e6c91c74e9f0279b7c51048779b3d62da60b88 (diff)
[ARM] cputype: separate definitions, use them
Add asm/cputype.h, moving functions and definitions from asm/system.h there. Convert all users of 'processor_id' to the more efficient read_cpuid_id() function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100/include')
-rw-r--r--arch/arm/mach-sa1100/include/mach/SA-1100.h16
-rw-r--r--arch/arm/mach-sa1100/include/mach/hardware.h18
2 files changed, 18 insertions, 16 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h
index 62aaf04a3906..4f7ea012e1e5 100644
--- a/arch/arm/mach-sa1100/include/mach/SA-1100.h
+++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h
@@ -2054,19 +2054,3 @@
2054 /* active display mode) */ 2054 /* active display mode) */
2055#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ 2055#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */
2056#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */ 2056#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */
2057
2058#ifndef __ASSEMBLY__
2059extern unsigned int processor_id;
2060#endif
2061
2062#define CPU_REVISION (processor_id & 15)
2063#define CPU_SA1110_A0 (0)
2064#define CPU_SA1110_B0 (4)
2065#define CPU_SA1110_B1 (5)
2066#define CPU_SA1110_B2 (6)
2067#define CPU_SA1110_B4 (8)
2068
2069#define CPU_SA1100_ID (0x4401a110)
2070#define CPU_SA1100_MASK (0xfffffff0)
2071#define CPU_SA1110_ID (0x6901b110)
2072#define CPU_SA1110_MASK (0xfffffff0)
diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h
index 5976435f42c2..b70846c096aa 100644
--- a/arch/arm/mach-sa1100/include/mach/hardware.h
+++ b/arch/arm/mach-sa1100/include/mach/hardware.h
@@ -36,8 +36,26 @@
36#define io_v2p( x ) \ 36#define io_v2p( x ) \
37 ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) 37 ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
38 38
39#define CPU_SA1110_A0 (0)
40#define CPU_SA1110_B0 (4)
41#define CPU_SA1110_B1 (5)
42#define CPU_SA1110_B2 (6)
43#define CPU_SA1110_B4 (8)
44
45#define CPU_SA1100_ID (0x4401a110)
46#define CPU_SA1100_MASK (0xfffffff0)
47#define CPU_SA1110_ID (0x6901b110)
48#define CPU_SA1110_MASK (0xfffffff0)
49
39#ifndef __ASSEMBLY__ 50#ifndef __ASSEMBLY__
40 51
52#include <asm/cputype.h>
53
54#define CPU_REVISION (read_cpuid_id() & 15)
55
56#define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID)
57#define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID)
58
41# define __REG(x) (*((volatile unsigned long *)io_p2v(x))) 59# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
42# define __PREG(x) (io_v2p((unsigned long)&(x))) 60# define __PREG(x) (io_v2p((unsigned long)&(x)))
43 61