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authorLinus Torvalds <torvalds@linux-foundation.org>2008-05-24 13:13:16 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-05-24 13:13:16 -0400
commitd3c5f8b93febadf62da9a4b39a2dca8e66a4da40 (patch)
treeccb5955591c0625bf36a9b6277ebd3a0c525d19a /arch/arm/mach-sa1100/collie.c
parent25d5cb4b0375e5864ec0ccf35e12ff1d1b5cf3f0 (diff)
parent7c28472a5d4ecf7c61b3c3901994be878cd6c5d2 (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] integrator: fix build warnings and errors [ARM] fix OMAP include loops Revert "[ARM] pxa: spitz wants PXA27x UDC definitions" [ARM] 5053/1: define before use of processor_id [ARM] 5052/1: export clock functions for the at91x40 [ARM] 5051/1: define pgtable_t for the !CONFIG_MMU case too [ARM] omap: fix omap clk support build errors [ARM] 5039/1: S3C244X: Rename SDI device if running on S3C244X. [ARM] 5043/1: pxafb: remove unused mode variable in pxafb_init_fbinfo [ARM] 5041/1: VR1000: Fix DM9000 IRQ flags initialisation [ARM] 5040/1: BAST: Fix DM9000 IRQ flags initialisation [ARM] 5038/1: ARM: OMAP: Remove tsc2102 references from board-palmte.c [ARM] 5025/2: fix collie cpu initialisation
Diffstat (limited to 'arch/arm/mach-sa1100/collie.c')
-rw-r--r--arch/arm/mach-sa1100/collie.c42
1 files changed, 22 insertions, 20 deletions
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 6496eb645cee..2f772a3965c4 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -225,26 +225,28 @@ static void __init collie_init(void)
225 int ret = 0; 225 int ret = 0;
226 226
227 /* cpu initialize */ 227 /* cpu initialize */
228 GAFR = ( GPIO_SSP_TXD | \ 228 GAFR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SSP_CLK |
229 GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SSP_CLK | GPIO_TIC_ACK | \ 229 GPIO_MCP_CLK | GPIO_32_768kHz;
230 GPIO_32_768kHz ); 230
231 231 GPDR = GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 |
232 GPDR = ( GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | \ 232 GPIO_LDD13 | GPIO_LDD14 | GPIO_LDD15 | GPIO_SSP_TXD |
233 GPIO_LDD13 | GPIO_LDD14 | GPIO_LDD15 | GPIO_SSP_TXD | \ 233 GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SDLC_SCLK |
234 GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SDLC_SCLK | \ 234 COLLIE_GPIO_UCB1x00_RESET | COLLIE_GPIO_nMIC_ON |
235 GPIO_SDLC_AAF | GPIO_UART_SCLK1 | GPIO_32_768kHz ); 235 COLLIE_GPIO_nREMOCON_ON | GPIO_32_768kHz;
236 GPLR = GPIO_GPIO18; 236
237 237 PPDR = PPC_LDD0 | PPC_LDD1 | PPC_LDD2 | PPC_LDD3 | PPC_LDD4 | PPC_LDD5 |
238 // PPC pin setting 238 PPC_LDD6 | PPC_LDD7 | PPC_L_PCLK | PPC_L_LCLK | PPC_L_FCLK | PPC_L_BIAS |
239 PPDR = ( PPC_LDD0 | PPC_LDD1 | PPC_LDD2 | PPC_LDD3 | PPC_LDD4 | PPC_LDD5 | \ 239 PPC_TXD1 | PPC_TXD2 | PPC_TXD3 | PPC_TXD4 | PPC_SCLK | PPC_SFRM;
240 PPC_LDD6 | PPC_LDD7 | PPC_L_PCLK | PPC_L_LCLK | PPC_L_FCLK | PPC_L_BIAS | \ 240
241 PPC_TXD1 | PPC_TXD2 | PPC_RXD2 | PPC_TXD3 | PPC_TXD4 | PPC_SCLK | PPC_SFRM ); 241 PWER = COLLIE_GPIO_AC_IN | COLLIE_GPIO_CO | COLLIE_GPIO_ON_KEY |
242 242 COLLIE_GPIO_WAKEUP | COLLIE_GPIO_nREMOCON_INT | PWER_RTC;
243 PSDR = ( PPC_RXD1 | PPC_RXD2 | PPC_RXD3 | PPC_RXD4 ); 243
244 244 PGSR = COLLIE_GPIO_nREMOCON_ON;
245 GAFR |= GPIO_32_768kHz; 245
246 GPDR |= GPIO_32_768kHz; 246 PSDR = PPC_RXD1 | PPC_RXD2 | PPC_RXD3 | PPC_RXD4;
247 TUCR = TUCR_32_768kHz; 247
248 PCFR = PCFR_OPDE;
249
248 250
249 platform_scoop_config = &collie_pcmcia_config; 251 platform_scoop_config = &collie_pcmcia_config;
250 252