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authorKyungmin Park <kyungmin.park@samsung.com>2010-10-11 18:49:20 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-10-25 03:03:38 -0400
commit8a3710dfbfb9f2712e3df3861ee7d0e8573be943 (patch)
tree46505289f98a82676a942a0d8a9d12d34fac0196 /arch/arm/mach-s5pv310
parent023c75c7c8fba0f603faf4458d955f61d213f0c7 (diff)
ARM: S5PV310: Define address & interrupt for all I2C blocks
S5PV310 and S5PC210 support total 8 (+ 1 dedicated for HDMI) I2C devices. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv310')
-rw-r--r--arch/arm/mach-s5pv310/include/mach/irqs.h7
-rw-r--r--arch/arm/mach-s5pv310/include/mach/map.h11
2 files changed, 16 insertions, 2 deletions
diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h
index e81332f0330f..b2acc6215667 100644
--- a/arch/arm/mach-s5pv310/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv310/include/mach/irqs.h
@@ -70,6 +70,13 @@
70#define IRQ_UART4 COMBINER_IRQ(26, 4) 70#define IRQ_UART4 COMBINER_IRQ(26, 4)
71 71
72#define IRQ_IIC COMBINER_IRQ(27, 0) 72#define IRQ_IIC COMBINER_IRQ(27, 0)
73#define IRQ_IIC1 COMBINER_IRQ(27, 1)
74#define IRQ_IIC2 COMBINER_IRQ(27, 2)
75#define IRQ_IIC3 COMBINER_IRQ(27, 3)
76#define IRQ_IIC4 COMBINER_IRQ(27, 4)
77#define IRQ_IIC5 COMBINER_IRQ(27, 5)
78#define IRQ_IIC6 COMBINER_IRQ(27, 6)
79#define IRQ_IIC7 COMBINER_IRQ(27, 7)
73 80
74#define IRQ_HSMMC0 COMBINER_IRQ(29, 0) 81#define IRQ_HSMMC0 COMBINER_IRQ(29, 0)
75#define IRQ_HSMMC1 COMBINER_IRQ(29, 1) 82#define IRQ_HSMMC1 COMBINER_IRQ(29, 1)
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h
index 8014c3a6dd5d..1e3384fba13a 100644
--- a/arch/arm/mach-s5pv310/include/mach/map.h
+++ b/arch/arm/mach-s5pv310/include/mach/map.h
@@ -67,7 +67,7 @@
67 67
68#define S5P_SZ_UART SZ_256 68#define S5P_SZ_UART SZ_256
69 69
70#define S5PV310_PA_IIC0 (0x13860000) 70#define S5PV310_PA_IIC(x) (0x13860000 + ((x) * 0x10000))
71 71
72#define S5PV310_PA_TIMER (0x139D0000) 72#define S5PV310_PA_TIMER (0x139D0000)
73#define S5P_PA_TIMER S5PV310_PA_TIMER 73#define S5P_PA_TIMER S5PV310_PA_TIMER
@@ -81,7 +81,14 @@
81#define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1) 81#define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1)
82#define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2) 82#define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2)
83#define S3C_PA_HSMMC3 S5PV310_PA_HSMMC(3) 83#define S3C_PA_HSMMC3 S5PV310_PA_HSMMC(3)
84#define S3C_PA_IIC S5PV310_PA_IIC0 84#define S3C_PA_IIC S5PV310_PA_IIC(0)
85#define S3C_PA_IIC1 S5PV310_PA_IIC(1)
86#define S3C_PA_IIC2 S5PV310_PA_IIC(2)
87#define S3C_PA_IIC3 S5PV310_PA_IIC(3)
88#define S3C_PA_IIC4 S5PV310_PA_IIC(4)
89#define S3C_PA_IIC5 S5PV310_PA_IIC(5)
90#define S3C_PA_IIC6 S5PV310_PA_IIC(6)
91#define S3C_PA_IIC7 S5PV310_PA_IIC(7)
85#define S3C_PA_RTC S5PV310_PA_RTC 92#define S3C_PA_RTC S5PV310_PA_RTC
86#define S3C_PA_WDT S5PV310_PA_WATCHDOG 93#define S3C_PA_WDT S5PV310_PA_WATCHDOG
87 94