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authorJongpill Lee <boyko.lee@samsung.com>2010-08-18 09:24:53 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-10-20 18:52:16 -0400
commit228ef9872b5c7e6fdb67a7a04547b33284242940 (patch)
tree85dc885c3c478afd95d03f52dc8d094aeb94280d /arch/arm/mach-s5pv310
parentb99380e1047842de199089cc0945d5d9f0ff6a17 (diff)
ARM: S5PV310: Adds printing ACLK200, ACLK100, ACLK160 and ACLK133
This patch adds log messages of aclk_200, aclk_100, aclk_160, and aclk_133. And adds clk_p.rate from calculated aclk_100. Signed-off-by: Jongpill Lee <boyko.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv310')
-rw-r--r--arch/arm/mach-s5pv310/clock.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c
index 7b7199a3ebe9..2c9424f9dfad 100644
--- a/arch/arm/mach-s5pv310/clock.c
+++ b/arch/arm/mach-s5pv310/clock.c
@@ -475,6 +475,10 @@ void __init_or_cpufreq s5pv310_setup_clocks(void)
475 unsigned long xtal; 475 unsigned long xtal;
476 unsigned long armclk; 476 unsigned long armclk;
477 unsigned long sclk_dmc; 477 unsigned long sclk_dmc;
478 unsigned long aclk_200;
479 unsigned long aclk_100;
480 unsigned long aclk_160;
481 unsigned long aclk_133;
478 unsigned int ptr; 482 unsigned int ptr;
479 483
480 printk(KERN_DEBUG "%s: registering clocks\n", __func__); 484 printk(KERN_DEBUG "%s: registering clocks\n", __func__);
@@ -507,10 +511,19 @@ void __init_or_cpufreq s5pv310_setup_clocks(void)
507 armclk = clk_get_rate(&clk_armclk.clk); 511 armclk = clk_get_rate(&clk_armclk.clk);
508 sclk_dmc = clk_get_rate(&clk_sclk_dmc.clk); 512 sclk_dmc = clk_get_rate(&clk_sclk_dmc.clk);
509 513
510 printk(KERN_INFO "S5PV310: ARMCLK=%ld, DMC=%ld\n", armclk, sclk_dmc); 514 aclk_200 = clk_get_rate(&clk_aclk_200.clk);
515 aclk_100 = clk_get_rate(&clk_aclk_100.clk);
516 aclk_160 = clk_get_rate(&clk_aclk_160.clk);
517 aclk_133 = clk_get_rate(&clk_aclk_133.clk);
518
519 printk(KERN_INFO "S5PV310: ARMCLK=%ld, DMC=%ld, ACLK200=%ld\n"
520 "ACLK100=%ld, ACLK160=%ld, ACLK133=%ld\n",
521 armclk, sclk_dmc, aclk_200,
522 aclk_100, aclk_160, aclk_133);
511 523
512 clk_f.rate = armclk; 524 clk_f.rate = armclk;
513 clk_h.rate = sclk_dmc; 525 clk_h.rate = sclk_dmc;
526 clk_p.rate = aclk_100;
514 527
515 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) 528 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
516 s3c_set_clksrc(&clksrcs[ptr], true); 529 s3c_set_clksrc(&clksrcs[ptr], true);