ARM: S5P: Move the SROM register definitions to plat-s5p

The SROM register difinitions of S5PV310/S5PC210 (mach/regs-srom.h)
can be used to other S5P SoCs such as S5PV210/S5PC110. So moved into
plat/regs-srom.h of plat-s5p directory.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

1 files changed, 15 insertions, 16 deletions

diff --git a/arch/arm/mach-s5pv310/mach-smdkv310.c b/arch/arm/mach-s5pv310/mach-smdkv310.c
index 35826d66632c..342660232342 100644
--- a/arch/arm/mach-s5pv310/mach-smdkv310.c
+++ b/arch/arm/mach-s5pv310/mach-smdkv310.c
@@ -19,13 +19,13 @@
 #include <asm/mach-types.h>
 
 #include <plat/regs-serial.h>
+#include <plat/regs-srom.h>
 #include <plat/s5pv310.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/sdhci.h>
 
 #include <mach/map.h>
-#include <mach/regs-srom.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
@@ -154,23 +154,22 @@ static void __init smdkv310_smsc911x_init(void)
         u32 cs1;
 
         /* configure nCS1 width to 16 bits */
-        cs1 = __raw_readl(S5PV310_SROM_BW) &
-                    ~(S5PV310_SROM_BW__CS_MASK <<
-                                    S5PV310_SROM_BW__NCS1__SHIFT);
-        cs1 |= ((1 << S5PV310_SROM_BW__DATAWIDTH__SHIFT) |
-                (1 << S5PV310_SROM_BW__WAITENABLE__SHIFT) |
-                (1 << S5PV310_SROM_BW__BYTEENABLE__SHIFT)) <<
-                S5PV310_SROM_BW__NCS1__SHIFT;
-        __raw_writel(cs1, S5PV310_SROM_BW);
+        cs1 = __raw_readl(S5P_SROM_BW) &
+                ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
+        cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
+                (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
+                (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
+                S5P_SROM_BW__NCS1__SHIFT;
+        __raw_writel(cs1, S5P_SROM_BW);
 
         /* set timing for nCS1 suitable for ethernet chip */
-        __raw_writel((0x1 << S5PV310_SROM_BCX__PMC__SHIFT) |
-                     (0x9 << S5PV310_SROM_BCX__TACP__SHIFT) |
-                     (0xc << S5PV310_SROM_BCX__TCAH__SHIFT) |
-                     (0x1 << S5PV310_SROM_BCX__TCOH__SHIFT) |
-                     (0x6 << S5PV310_SROM_BCX__TACC__SHIFT) |
-                     (0x1 << S5PV310_SROM_BCX__TCOS__SHIFT) |
-                     (0x1 << S5PV310_SROM_BCX__TACS__SHIFT), S5PV310_SROM_BC1);
+        __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
+                     (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
+                     (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
+                     (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
+                     (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
+                     (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
+                     (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 }
 
 static void __init smdkv310_map_io(void)