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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-15 15:33:40 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-15 15:33:40 -0500 |
commit | 16c1020362083b320868c0deef492249089c3cd3 (patch) | |
tree | ff200df3502e6010745713275d69fd0a07e399cf /arch/arm/mach-s5pv310/irq-eint.c | |
parent | 65e5d002b5ad220db2bf9557f53de5a98f7dab86 (diff) | |
parent | bbba75606963c82febf7bd2761ea848ac5d1a1bb (diff) |
Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits)
ARM: pxa: fix building issue of missing physmap.h
ARM: mmp: PXA910 drive strength FAST using wrong value
ARM: mmp: MMP2 drive strength FAST using wrong value
ARM: pxa: fix recursive calls in pxa_low_gpio_chip
AT91: Support for gsia18s board
AT91: Acme Systems FOX Board G20 board files
AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h
ARM: pxa: fix suspend/resume array index miscalculation
ARM: pxa: use cpu_has_ipr() consistently in irq.c
ARM: pxa: remove unused variable in clock-pxa3xx.c
ARM: pxa: fix warning in zeus.c
ARM: sa1111: fix typo in sa1111_retrigger_lowirq()
ARM mxs: clkdev related compile fixes
ARM i.MX mx31_3ds: Fix MC13783 regulator names
ARM: plat-stmp3xxx: irq_data conversion.
ARM: plat-spear: irq_data conversion.
ARM: plat-orion: irq_data conversion.
ARM: plat-omap: irq_data conversion.
ARM: plat-nomadik: irq_data conversion.
ARM: plat-mxc: irq_data conversion.
...
Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert
Buytenhek's irq_data conversion clashing with some omap irq updates)
Diffstat (limited to 'arch/arm/mach-s5pv310/irq-eint.c')
-rw-r--r-- | arch/arm/mach-s5pv310/irq-eint.c | 55 |
1 files changed, 28 insertions, 27 deletions
diff --git a/arch/arm/mach-s5pv310/irq-eint.c b/arch/arm/mach-s5pv310/irq-eint.c index 5877503e92c3..477bd9e97f0f 100644 --- a/arch/arm/mach-s5pv310/irq-eint.c +++ b/arch/arm/mach-s5pv310/irq-eint.c | |||
@@ -48,42 +48,43 @@ static unsigned int s5pv310_get_irq_nr(unsigned int number) | |||
48 | return ret; | 48 | return ret; |
49 | } | 49 | } |
50 | 50 | ||
51 | static inline void s5pv310_irq_eint_mask(unsigned int irq) | 51 | static inline void s5pv310_irq_eint_mask(struct irq_data *data) |
52 | { | 52 | { |
53 | u32 mask; | 53 | u32 mask; |
54 | 54 | ||
55 | spin_lock(&eint_lock); | 55 | spin_lock(&eint_lock); |
56 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); | 56 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); |
57 | mask |= eint_irq_to_bit(irq); | 57 | mask |= eint_irq_to_bit(data->irq); |
58 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); | 58 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); |
59 | spin_unlock(&eint_lock); | 59 | spin_unlock(&eint_lock); |
60 | } | 60 | } |
61 | 61 | ||
62 | static void s5pv310_irq_eint_unmask(unsigned int irq) | 62 | static void s5pv310_irq_eint_unmask(struct irq_data *data) |
63 | { | 63 | { |
64 | u32 mask; | 64 | u32 mask; |
65 | 65 | ||
66 | spin_lock(&eint_lock); | 66 | spin_lock(&eint_lock); |
67 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); | 67 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); |
68 | mask &= ~(eint_irq_to_bit(irq)); | 68 | mask &= ~(eint_irq_to_bit(data->irq)); |
69 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); | 69 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); |
70 | spin_unlock(&eint_lock); | 70 | spin_unlock(&eint_lock); |
71 | } | 71 | } |
72 | 72 | ||
73 | static inline void s5pv310_irq_eint_ack(unsigned int irq) | 73 | static inline void s5pv310_irq_eint_ack(struct irq_data *data) |
74 | { | 74 | { |
75 | __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); | 75 | __raw_writel(eint_irq_to_bit(data->irq), |
76 | S5P_EINT_PEND(EINT_REG_NR(data->irq))); | ||
76 | } | 77 | } |
77 | 78 | ||
78 | static void s5pv310_irq_eint_maskack(unsigned int irq) | 79 | static void s5pv310_irq_eint_maskack(struct irq_data *data) |
79 | { | 80 | { |
80 | s5pv310_irq_eint_mask(irq); | 81 | s5pv310_irq_eint_mask(data); |
81 | s5pv310_irq_eint_ack(irq); | 82 | s5pv310_irq_eint_ack(data); |
82 | } | 83 | } |
83 | 84 | ||
84 | static int s5pv310_irq_eint_set_type(unsigned int irq, unsigned int type) | 85 | static int s5pv310_irq_eint_set_type(struct irq_data *data, unsigned int type) |
85 | { | 86 | { |
86 | int offs = EINT_OFFSET(irq); | 87 | int offs = EINT_OFFSET(data->irq); |
87 | int shift; | 88 | int shift; |
88 | u32 ctrl, mask; | 89 | u32 ctrl, mask; |
89 | u32 newvalue = 0; | 90 | u32 newvalue = 0; |
@@ -118,10 +119,10 @@ static int s5pv310_irq_eint_set_type(unsigned int irq, unsigned int type) | |||
118 | mask = 0x7 << shift; | 119 | mask = 0x7 << shift; |
119 | 120 | ||
120 | spin_lock(&eint_lock); | 121 | spin_lock(&eint_lock); |
121 | ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(irq))); | 122 | ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq))); |
122 | ctrl &= ~mask; | 123 | ctrl &= ~mask; |
123 | ctrl |= newvalue << shift; | 124 | ctrl |= newvalue << shift; |
124 | __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(irq))); | 125 | __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq))); |
125 | spin_unlock(&eint_lock); | 126 | spin_unlock(&eint_lock); |
126 | 127 | ||
127 | switch (offs) { | 128 | switch (offs) { |
@@ -146,13 +147,13 @@ static int s5pv310_irq_eint_set_type(unsigned int irq, unsigned int type) | |||
146 | 147 | ||
147 | static struct irq_chip s5pv310_irq_eint = { | 148 | static struct irq_chip s5pv310_irq_eint = { |
148 | .name = "s5pv310-eint", | 149 | .name = "s5pv310-eint", |
149 | .mask = s5pv310_irq_eint_mask, | 150 | .irq_mask = s5pv310_irq_eint_mask, |
150 | .unmask = s5pv310_irq_eint_unmask, | 151 | .irq_unmask = s5pv310_irq_eint_unmask, |
151 | .mask_ack = s5pv310_irq_eint_maskack, | 152 | .irq_mask_ack = s5pv310_irq_eint_maskack, |
152 | .ack = s5pv310_irq_eint_ack, | 153 | .irq_ack = s5pv310_irq_eint_ack, |
153 | .set_type = s5pv310_irq_eint_set_type, | 154 | .irq_set_type = s5pv310_irq_eint_set_type, |
154 | #ifdef CONFIG_PM | 155 | #ifdef CONFIG_PM |
155 | .set_wake = s3c_irqext_wake, | 156 | .irq_set_wake = s3c_irqext_wake, |
156 | #endif | 157 | #endif |
157 | }; | 158 | }; |
158 | 159 | ||
@@ -192,14 +193,14 @@ static void s5pv310_irq_eint0_15(unsigned int irq, struct irq_desc *desc) | |||
192 | u32 *irq_data = get_irq_data(irq); | 193 | u32 *irq_data = get_irq_data(irq); |
193 | struct irq_chip *chip = get_irq_chip(irq); | 194 | struct irq_chip *chip = get_irq_chip(irq); |
194 | 195 | ||
195 | chip->mask(irq); | 196 | chip->irq_mask(&desc->irq_data); |
196 | 197 | ||
197 | if (chip->ack) | 198 | if (chip->irq_ack) |
198 | chip->ack(irq); | 199 | chip->irq_ack(&desc->irq_data); |
199 | 200 | ||
200 | generic_handle_irq(*irq_data); | 201 | generic_handle_irq(*irq_data); |
201 | 202 | ||
202 | chip->unmask(irq); | 203 | chip->irq_unmask(&desc->irq_data); |
203 | } | 204 | } |
204 | 205 | ||
205 | int __init s5pv310_init_irq_eint(void) | 206 | int __init s5pv310_init_irq_eint(void) |