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authorLennert Buytenhek <buytenh@secretlab.ca>2010-12-14 16:55:26 -0500
committerKukjin Kim <kgene.kim@samsung.com>2011-01-03 05:18:16 -0500
commitbb0b2374677b0678e671254112a326135522aba7 (patch)
tree36b15c066c93ac9bc17107eeaac54abacc6cc8c8 /arch/arm/mach-s5pv310/irq-combiner.c
parent57436c2db4426c5dcbaaba0acd5204f5fa71b762 (diff)
ARM: S5P: irq_data conversion
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv310/irq-combiner.c')
-rw-r--r--arch/arm/mach-s5pv310/irq-combiner.c26
1 files changed, 14 insertions, 12 deletions
diff --git a/arch/arm/mach-s5pv310/irq-combiner.c b/arch/arm/mach-s5pv310/irq-combiner.c
index c3f88c3faf6c..9cdd1e4d4a40 100644
--- a/arch/arm/mach-s5pv310/irq-combiner.c
+++ b/arch/arm/mach-s5pv310/irq-combiner.c
@@ -29,24 +29,26 @@ struct combiner_chip_data {
29 29
30static struct combiner_chip_data combiner_data[MAX_COMBINER_NR]; 30static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
31 31
32static inline void __iomem *combiner_base(unsigned int irq) 32static inline void __iomem *combiner_base(struct irq_data *data)
33{ 33{
34 struct combiner_chip_data *combiner_data = get_irq_chip_data(irq); 34 struct combiner_chip_data *combiner_data =
35 irq_data_get_irq_chip_data(data);
36
35 return combiner_data->base; 37 return combiner_data->base;
36} 38}
37 39
38static void combiner_mask_irq(unsigned int irq) 40static void combiner_mask_irq(struct irq_data *data)
39{ 41{
40 u32 mask = 1 << (irq % 32); 42 u32 mask = 1 << (data->irq % 32);
41 43
42 __raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_CLEAR); 44 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
43} 45}
44 46
45static void combiner_unmask_irq(unsigned int irq) 47static void combiner_unmask_irq(struct irq_data *data)
46{ 48{
47 u32 mask = 1 << (irq % 32); 49 u32 mask = 1 << (data->irq % 32);
48 50
49 __raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_SET); 51 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
50} 52}
51 53
52static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) 54static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
@@ -57,7 +59,7 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
57 unsigned long status; 59 unsigned long status;
58 60
59 /* primary controller ack'ing */ 61 /* primary controller ack'ing */
60 chip->ack(irq); 62 chip->irq_ack(&desc->irq_data);
61 63
62 spin_lock(&irq_controller_lock); 64 spin_lock(&irq_controller_lock);
63 status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); 65 status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
@@ -76,13 +78,13 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
76 78
77 out: 79 out:
78 /* primary controller unmasking */ 80 /* primary controller unmasking */
79 chip->unmask(irq); 81 chip->irq_unmask(&desc->irq_data);
80} 82}
81 83
82static struct irq_chip combiner_chip = { 84static struct irq_chip combiner_chip = {
83 .name = "COMBINER", 85 .name = "COMBINER",
84 .mask = combiner_mask_irq, 86 .irq_mask = combiner_mask_irq,
85 .unmask = combiner_unmask_irq, 87 .irq_unmask = combiner_unmask_irq,
86}; 88};
87 89
88void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq) 90void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)