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authorSylwester Nawrocki <s.nawrocki@samsung.com>2010-12-17 01:08:03 -0500
committerKukjin Kim <kgene.kim@samsung.com>2010-12-29 19:37:49 -0500
commit7db8cb2ad5042696ccc735b669ca33fa875e2d21 (patch)
tree6ba3c6ab7c010313805510acfa0b0a0503eebae7 /arch/arm/mach-s5pv310/include
parent5905bbfa5b47f14c9df5c23edf1ec805ceb0d6fe (diff)
ARM: S5PV310: Add resource definitions for MIPI CSIS
Add IRQ and register base address definitions for MIPI CSI slave devices. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv310/include')
-rw-r--r--arch/arm/mach-s5pv310/include/mach/irqs.h3
-rw-r--r--arch/arm/mach-s5pv310/include/mach/map.h5
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h
index 99e7dad8a85a..0a2544aaee0c 100644
--- a/arch/arm/mach-s5pv310/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv310/include/mach/irqs.h
@@ -83,6 +83,9 @@
83#define IRQ_HSMMC2 COMBINER_IRQ(29, 2) 83#define IRQ_HSMMC2 COMBINER_IRQ(29, 2)
84#define IRQ_HSMMC3 COMBINER_IRQ(29, 3) 84#define IRQ_HSMMC3 COMBINER_IRQ(29, 3)
85 85
86#define IRQ_MIPI_CSIS0 COMBINER_IRQ(30, 0)
87#define IRQ_MIPI_CSIS1 COMBINER_IRQ(30, 1)
88
86#define IRQ_ONENAND_AUDI COMBINER_IRQ(34, 0) 89#define IRQ_ONENAND_AUDI COMBINER_IRQ(34, 0)
87 90
88#define IRQ_EINT4 COMBINER_IRQ(37, 0) 91#define IRQ_EINT4 COMBINER_IRQ(37, 0)
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h
index 279723d0fc09..5eab2ecfed2a 100644
--- a/arch/arm/mach-s5pv310/include/mach/map.h
+++ b/arch/arm/mach-s5pv310/include/mach/map.h
@@ -56,6 +56,9 @@
56#define S5PV310_PA_GPIO2 (0x11000000) 56#define S5PV310_PA_GPIO2 (0x11000000)
57#define S5PV310_PA_GPIO3 (0x03860000) 57#define S5PV310_PA_GPIO3 (0x03860000)
58 58
59#define S5PV310_PA_MIPI_CSIS0 0x11880000
60#define S5PV310_PA_MIPI_CSIS1 0x11890000
61
59#define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) 62#define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
60 63
61#define S5PV310_PA_SROMC (0x12570000) 64#define S5PV310_PA_SROMC (0x12570000)
@@ -96,5 +99,7 @@
96#define S3C_PA_IIC7 S5PV310_PA_IIC(7) 99#define S3C_PA_IIC7 S5PV310_PA_IIC(7)
97#define S3C_PA_RTC S5PV310_PA_RTC 100#define S3C_PA_RTC S5PV310_PA_RTC
98#define S3C_PA_WDT S5PV310_PA_WATCHDOG 101#define S3C_PA_WDT S5PV310_PA_WATCHDOG
102#define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0
103#define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1
99 104
100#endif /* __ASM_ARCH_MAP_H */ 105#endif /* __ASM_ARCH_MAP_H */