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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-15 15:33:40 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-15 15:33:40 -0500 |
commit | 16c1020362083b320868c0deef492249089c3cd3 (patch) | |
tree | ff200df3502e6010745713275d69fd0a07e399cf /arch/arm/mach-s5pv310/cpu.c | |
parent | 65e5d002b5ad220db2bf9557f53de5a98f7dab86 (diff) | |
parent | bbba75606963c82febf7bd2761ea848ac5d1a1bb (diff) |
Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits)
ARM: pxa: fix building issue of missing physmap.h
ARM: mmp: PXA910 drive strength FAST using wrong value
ARM: mmp: MMP2 drive strength FAST using wrong value
ARM: pxa: fix recursive calls in pxa_low_gpio_chip
AT91: Support for gsia18s board
AT91: Acme Systems FOX Board G20 board files
AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h
ARM: pxa: fix suspend/resume array index miscalculation
ARM: pxa: use cpu_has_ipr() consistently in irq.c
ARM: pxa: remove unused variable in clock-pxa3xx.c
ARM: pxa: fix warning in zeus.c
ARM: sa1111: fix typo in sa1111_retrigger_lowirq()
ARM mxs: clkdev related compile fixes
ARM i.MX mx31_3ds: Fix MC13783 regulator names
ARM: plat-stmp3xxx: irq_data conversion.
ARM: plat-spear: irq_data conversion.
ARM: plat-orion: irq_data conversion.
ARM: plat-omap: irq_data conversion.
ARM: plat-nomadik: irq_data conversion.
ARM: plat-mxc: irq_data conversion.
...
Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert
Buytenhek's irq_data conversion clashing with some omap irq updates)
Diffstat (limited to 'arch/arm/mach-s5pv310/cpu.c')
-rw-r--r-- | arch/arm/mach-s5pv310/cpu.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c index 72ab289e7816..0db0fb65bd70 100644 --- a/arch/arm/mach-s5pv310/cpu.c +++ b/arch/arm/mach-s5pv310/cpu.c | |||
@@ -41,6 +41,11 @@ static struct map_desc s5pv310_iodesc[] __initdata = { | |||
41 | .length = SZ_128K, | 41 | .length = SZ_128K, |
42 | .type = MT_DEVICE, | 42 | .type = MT_DEVICE, |
43 | }, { | 43 | }, { |
44 | .virtual = (unsigned long)S5P_VA_PMU, | ||
45 | .pfn = __phys_to_pfn(S5PV310_PA_PMU), | ||
46 | .length = SZ_64K, | ||
47 | .type = MT_DEVICE, | ||
48 | }, { | ||
44 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, | 49 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, |
45 | .pfn = __phys_to_pfn(S5PV310_PA_COMBINER), | 50 | .pfn = __phys_to_pfn(S5PV310_PA_COMBINER), |
46 | .length = SZ_4K, | 51 | .length = SZ_4K, |
@@ -71,6 +76,11 @@ static struct map_desc s5pv310_iodesc[] __initdata = { | |||
71 | .length = SZ_256, | 76 | .length = SZ_256, |
72 | .type = MT_DEVICE, | 77 | .type = MT_DEVICE, |
73 | }, { | 78 | }, { |
79 | .virtual = (unsigned long)S5P_VA_DMC0, | ||
80 | .pfn = __phys_to_pfn(S5PV310_PA_DMC0), | ||
81 | .length = SZ_4K, | ||
82 | .type = MT_DEVICE, | ||
83 | }, { | ||
74 | .virtual = (unsigned long)S3C_VA_UART, | 84 | .virtual = (unsigned long)S3C_VA_UART, |
75 | .pfn = __phys_to_pfn(S3C_PA_UART), | 85 | .pfn = __phys_to_pfn(S3C_PA_UART), |
76 | .length = SZ_512K, | 86 | .length = SZ_512K, |
@@ -123,6 +133,15 @@ void __init s5pv310_init_irq(void) | |||
123 | gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); | 133 | gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); |
124 | 134 | ||
125 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { | 135 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { |
136 | |||
137 | /* | ||
138 | * From SPI(0) to SPI(39) and SPI(51), SPI(53) are | ||
139 | * connected to the interrupt combiner. These irqs | ||
140 | * should be initialized to support cascade interrupt. | ||
141 | */ | ||
142 | if ((irq >= 40) && !(irq == 51) && !(irq == 53)) | ||
143 | continue; | ||
144 | |||
126 | combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), | 145 | combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), |
127 | COMBINER_IRQ(irq, 0)); | 146 | COMBINER_IRQ(irq, 0)); |
128 | combiner_cascade_irq(irq, IRQ_SPI(irq)); | 147 | combiner_cascade_irq(irq, IRQ_SPI(irq)); |
@@ -164,7 +183,7 @@ static int __init s5pv310_l2x0_cache_init(void) | |||
164 | __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, | 183 | __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, |
165 | S5P_VA_L2CC + L2X0_POWER_CTRL); | 184 | S5P_VA_L2CC + L2X0_POWER_CTRL); |
166 | 185 | ||
167 | l2x0_init(S5P_VA_L2CC, 0x7C070001, 0xC200ffff); | 186 | l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); |
168 | 187 | ||
169 | return 0; | 188 | return 0; |
170 | } | 189 | } |