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authorJaecheol Lee <jc.lee@samsung.com>2010-10-11 20:19:26 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-10-25 03:03:48 -0400
commit88695843973d3d53a087fc03049668600e91b5c4 (patch)
tree6598a2cbfb82d69110d0bda23c1d79e477f6ce41 /arch/arm/mach-s5pv210
parentb7a9825553e9213e5129f7e8e53065e918981a70 (diff)
ARM: S5PV210: Add struct clk_ops for clk_fout_apll
Current fout_apll has fixed rate value. So CPUFREQ driver gets incorrect value when finding current CPU frequency. Because some operation level need to change APLL. Added get_rate function for fout_apll can give correct frequency value when calling get_rate function. Signed-off-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv210')
-rw-r--r--arch/arm/mach-s5pv210/clock.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index d562670e1b0b..e18e09809059 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -31,6 +31,8 @@
31#include <plat/clock-clksrc.h> 31#include <plat/clock-clksrc.h>
32#include <plat/s5pv210.h> 32#include <plat/s5pv210.h>
33 33
34static unsigned long xtal;
35
34static struct clksrc_clk clk_mout_apll = { 36static struct clksrc_clk clk_mout_apll = {
35 .clk = { 37 .clk = {
36 .name = "mout_apll", 38 .name = "mout_apll",
@@ -268,6 +270,15 @@ static struct clk_ops clk_hclk_imem_ops = {
268 .get_rate = s5pv210_clk_imem_get_rate, 270 .get_rate = s5pv210_clk_imem_get_rate,
269}; 271};
270 272
273static unsigned long s5pv210_clk_fout_apll_get_rate(struct clk *clk)
274{
275 return s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
276}
277
278static struct clk_ops clk_fout_apll_ops = {
279 .get_rate = s5pv210_clk_fout_apll_get_rate,
280};
281
271static struct clk init_clocks_disable[] = { 282static struct clk init_clocks_disable[] = {
272 { 283 {
273 .name = "rot", 284 .name = "rot",
@@ -958,7 +969,6 @@ static struct clksrc_clk *sysclks[] = {
958void __init_or_cpufreq s5pv210_setup_clocks(void) 969void __init_or_cpufreq s5pv210_setup_clocks(void)
959{ 970{
960 struct clk *xtal_clk; 971 struct clk *xtal_clk;
961 unsigned long xtal;
962 unsigned long vpllsrc; 972 unsigned long vpllsrc;
963 unsigned long armclk; 973 unsigned long armclk;
964 unsigned long hclk_msys; 974 unsigned long hclk_msys;
@@ -996,7 +1006,7 @@ void __init_or_cpufreq s5pv210_setup_clocks(void)
996 vpllsrc = clk_get_rate(&clk_vpllsrc.clk); 1006 vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
997 vpll = s5p_get_pll45xx(vpllsrc, __raw_readl(S5P_VPLL_CON), pll_4502); 1007 vpll = s5p_get_pll45xx(vpllsrc, __raw_readl(S5P_VPLL_CON), pll_4502);
998 1008
999 clk_fout_apll.rate = apll; 1009 clk_fout_apll.ops = &clk_fout_apll_ops;
1000 clk_fout_mpll.rate = mpll; 1010 clk_fout_mpll.rate = mpll;
1001 clk_fout_epll.rate = epll; 1011 clk_fout_epll.rate = epll;
1002 clk_fout_vpll.rate = vpll; 1012 clk_fout_vpll.rate = vpll;