ARM: Merge for-2635-4/s5pv210-boards

Merge branch 'for-2635-4/s5pv210-boards' into for-2635-4/partial1

Conflicts:
	arch/arm/mach-s5pv210/include/mach/map.h

14 files changed, 625 insertions, 8 deletions

diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 5649733bf815..88f81ce2f888 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -17,10 +17,50 @@ config CPU_S5PV210
         help
           Enable S5PV210 CPU support
 
-choice
-        prompt "Select machine type"
-        depends on ARCH_S5PV210
-        default MACH_SMDKV210
+config S5PV210_SETUP_I2C1
+        bool
+        help
+          Common setup code for i2c bus 1.
+
+config S5PV210_SETUP_I2C2
+        bool
+        help
+          Common setup code for i2c bus 2.
+
+config S5PV210_SETUP_FB_24BPP
+        bool
+        help
+          Common setup code for S5PV210 with an 24bpp RGB display helper.
+
+config S5PV210_SETUP_SDHCI
+        bool
+        select S5PV210_SETUP_SDHCI_GPIO
+        help
+          Internal helper functions for S5PV210 based SDHCI systems
+
+config S5PV210_SETUP_SDHCI_GPIO
+        bool
+        help
+          Common setup code for SDHCI gpio.
+
+# machine support
+
+config MACH_AQUILA
+        bool "Samsung Aquila"
+        select CPU_S5PV210
+        select ARCH_SPARSEMEM_ENABLE
+        select S5PV210_SETUP_FB_24BPP
+        select S3C_DEV_FB
+        help
+          Machine support for the Samsung Aquila target based on S5PC110 SoC
+
+config MACH_GONI
+        bool "GONI"
+        select CPU_S5PV210
+        select ARCH_SPARSEMEM_ENABLE
+        help
+          Machine support for Samsung GONI board
+          S5PC110(MCP) is one of package option of S5PV210
 
 config MACH_SMDKV210
         bool "SMDKV210"
@@ -39,6 +79,4 @@ config MACH_SMDKC110
           Machine support for Samsung SMDKC110
           S5PC110(MCP) is one of package option of S5PV210
 
-endchoice
-
 endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 99827813d293..6c0cba8dfafa 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -17,9 +17,16 @@ obj-$(CONFIG_CPU_S5PV210)	+= setup-i2c0.o
 
 # machine support
 
+obj-$(CONFIG_MACH_AQUILA)       += mach-aquila.o
 obj-$(CONFIG_MACH_SMDKV210)     += mach-smdkv210.o
 obj-$(CONFIG_MACH_SMDKC110)     += mach-smdkc110.o
+obj-$(CONFIG_MACH_GONI)         += mach-goni.o
 
 # device support
 
 obj-y                           += dev-audio.o
+obj-$(CONFIG_S5PV210_SETUP_FB_24BPP)    += setup-fb-24bpp.o
+obj-$(CONFIG_S5PV210_SETUP_I2C1)        += setup-i2c1.o
+obj-$(CONFIG_S5PV210_SETUP_I2C2)        += setup-i2c2.o
+obj-$(CONFIG_S5PV210_SETUP_SDHCI)       += setup-sdhci.o
+obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index 359bdc8f3b66..76084d85fd21 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -32,6 +32,8 @@
 #include <plat/devs.h>
 #include <plat/clock.h>
 #include <plat/s5pv210.h>
+#include <plat/iic-core.h>
+#include <plat/sdhci.h>
 
 /* Initial IO mappings */
 
@@ -77,6 +79,16 @@ void __init s5pv210_map_io(void)
         s3c_device_adc.name     = "s3c64xx-adc";
 
         iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
+
+        /* initialise device information early */
+        s5pv210_default_sdhci0();
+        s5pv210_default_sdhci1();
+        s5pv210_default_sdhci2();
+
+        /* the i2c devices are directly compatible with s3c2440 */
+        s3c_i2c0_setname("s3c2440-i2c");
+        s3c_i2c1_setname("s3c2440-i2c");
+        s3c_i2c2_setname("s3c2440-i2c");
 }
 
 void __init s5pv210_init_clocks(int xtal)
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 3a9e42e7734b..92fc6c7fc064 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -134,4 +134,9 @@
 #define EINT_GPIO_2(x)          S5PV210_GPH2(x)
 #define EINT_GPIO_3(x)          S5PV210_GPH3(x)
 
+/* Compatibility */
+#define IRQ_LCD_FIFO            IRQ_LCD0
+#define IRQ_LCD_VSYNC           IRQ_LCD1
+#define IRQ_LCD_SYSTEM          IRQ_LCD2
+
 #endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index e85957083055..fb5d05e91e44 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -26,6 +26,8 @@
 #define S5P_PA_GPIO             S5PV210_PA_GPIO
 
 #define S5PV210_PA_IIC0         (0xE1800000)
+#define S5PV210_PA_IIC1         (0xFAB00000)
+#define S5PV210_PA_IIC2         (0xE1A00000)
 
 #define S5PV210_PA_TIMER        (0xE2500000)
 #define S5P_PA_TIMER            S5PV210_PA_TIMER
@@ -47,6 +49,10 @@
 #define S5PV210_PA_PDMA0        0xE0900000
 #define S5PV210_PA_PDMA1        0xE0A00000
 
+#define S5PV210_PA_FB           (0xF8000000)
+
+#define S5PV210_PA_HSMMC(x)     (0xEB000000 + ((x) * 0x100000))
+
 #define S5PV210_PA_VIC0         (0xF2000000)
 #define S5P_PA_VIC0             S5PV210_PA_VIC0
 
@@ -79,7 +85,14 @@
 
 /* compatibiltiy defines. */
 #define S3C_PA_UART             S5PV210_PA_UART
+#define S3C_PA_HSMMC0           S5PV210_PA_HSMMC(0)
+#define S3C_PA_HSMMC1           S5PV210_PA_HSMMC(1)
+#define S3C_PA_HSMMC2           S5PV210_PA_HSMMC(2)
 #define S3C_PA_IIC              S5PV210_PA_IIC0
+#define S3C_PA_IIC1             S5PV210_PA_IIC1
+#define S3C_PA_IIC2             S5PV210_PA_IIC2
+#define S3C_PA_FB               S5PV210_PA_FB
+
 #define SAMSUNG_PA_ADC          S5PV210_PA_ADC
 
 #endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index e56e0e4673ed..2a25ab40c863 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -126,6 +126,7 @@
 
 #define S5P_RST_STAT            S5P_CLKREG(0xA000)
 #define S5P_OSC_CON             S5P_CLKREG(0x8000)
+#define S5P_MDNIE_SEL           S5P_CLKREG(0x7008)
 #define S5P_MIPI_PHY_CON0       S5P_CLKREG(0x7200)
 #define S5P_MIPI_PHY_CON1       S5P_CLKREG(0x7204)
 #define S5P_MIPI_CONTROL        S5P_CLKREG(0xE814)
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
new file mode 100644
index 000000000000..10bc76ec4025
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -0,0 +1,149 @@
+/* linux/arch/arm/mach-s5pv210/mach-aquila.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+#include <linux/fb.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+#include <mach/regs-fb.h>
+
+#include <plat/regs-serial.h>
+#include <plat/s5pv210.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+#include <plat/fb.h>
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+                                 S3C2410_UCON_RXILEVEL |        \
+                                 S3C2410_UCON_TXIRQMODE |       \
+                                 S3C2410_UCON_RXIRQMODE |       \
+                                 S3C2410_UCON_RXFIFO_TOI |      \
+                                 S3C2443_UCON_RXERR_IRQEN)
+
+#define S5PV210_ULCON_DEFAULT   S3C2410_LCON_CS8
+
+#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+                                 S5PV210_UFCON_TXTRIG4 |        \
+                                 S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport         = 0,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport         = 1,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport         = 2,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [3] = {
+                .hwport         = 3,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+};
+
+/* Frame Buffer */
+static struct s3c_fb_pd_win aquila_fb_win0 = {
+        .win_mode = {
+                .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
+                .left_margin = 16,
+                .right_margin = 16,
+                .upper_margin = 3,
+                .lower_margin = 28,
+                .hsync_len = 2,
+                .vsync_len = 2,
+                .xres = 480,
+                .yres = 800,
+        },
+        .max_bpp = 32,
+        .default_bpp = 16,
+};
+
+static struct s3c_fb_pd_win aquila_fb_win1 = {
+        .win_mode = {
+                .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
+                .left_margin = 16,
+                .right_margin = 16,
+                .upper_margin = 3,
+                .lower_margin = 28,
+                .hsync_len = 2,
+                .vsync_len = 2,
+                .xres = 480,
+                .yres = 800,
+        },
+        .max_bpp = 32,
+        .default_bpp = 16,
+};
+
+static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
+        .win[0]         = &aquila_fb_win0,
+        .win[1]         = &aquila_fb_win1,
+        .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
+        .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
+                          VIDCON1_INV_VCLK | VIDCON1_INV_VDEN,
+        .setup_gpio     = s5pv210_fb_gpio_setup_24bpp,
+};
+
+static struct platform_device *aquila_devices[] __initdata = {
+        &s3c_device_fb,
+};
+
+static void __init aquila_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s3c24xx_init_clocks(24000000);
+        s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
+}
+
+static void __init aquila_machine_init(void)
+{
+        /* FB */
+        s3c_fb_set_platdata(&aquila_lcd_pdata);
+
+        platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices));
+}
+
+MACHINE_START(AQUILA, "Aquila")
+        /* Maintainers:
+           Marek Szyprowski <m.szyprowski@samsung.com>
+           Kyungmin Park <kyungmin.park@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+        .init_irq       = s5pv210_init_irq,
+        .map_io         = aquila_map_io,
+        .init_machine   = aquila_machine_init,
+        .timer          = &s3c24xx_timer,
+MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
new file mode 100644
index 000000000000..4863b13824e4
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -0,0 +1,98 @@
+/* linux/arch/arm/mach-s5pv210/mach-goni.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/regs-serial.h>
+#include <plat/s5pv210.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+                                 S3C2410_UCON_RXILEVEL |        \
+                                 S3C2410_UCON_TXIRQMODE |       \
+                                 S3C2410_UCON_RXIRQMODE |       \
+                                 S3C2410_UCON_RXFIFO_TOI |      \
+                                 S3C2443_UCON_RXERR_IRQEN)
+
+#define S5PV210_ULCON_DEFAULT   S3C2410_LCON_CS8
+
+#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+                                 S5PV210_UFCON_TXTRIG4 |        \
+                                 S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport         = 0,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport         = 1,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport         = 2,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [3] = {
+                .hwport         = 3,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+};
+
+static struct platform_device *goni_devices[] __initdata = {
+};
+
+static void __init goni_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s3c24xx_init_clocks(24000000);
+        s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs));
+}
+
+static void __init goni_machine_init(void)
+{
+        platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices));
+}
+
+MACHINE_START(GONI, "GONI")
+        /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+        .init_irq       = s5pv210_init_irq,
+        .map_io         = goni_map_io,
+        .init_machine   = goni_machine_init,
+        .timer          = &s3c24xx_timer,
+MACHINE_END
diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
new file mode 100644
index 000000000000..a50cbac8720d
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
@@ -0,0 +1,62 @@
+/* linux/arch/arm/plat-s5pv210/setup-fb-24bpp.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Base s5pv210 setup information for 24bpp LCD framebuffer
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/fb.h>
+
+#include <mach/regs-fb.h>
+#include <mach/gpio.h>
+#include <mach/map.h>
+#include <plat/fb.h>
+#include <mach/regs-clock.h>
+#include <plat/gpio-cfg.h>
+
+void s5pv210_fb_gpio_setup_24bpp(void)
+{
+        unsigned int gpio = 0;
+
+        for (gpio = S5PV210_GPF0(0); gpio <= S5PV210_GPF0(7); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+
+        for (gpio = S5PV210_GPF1(0); gpio <= S5PV210_GPF1(7); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+
+        for (gpio = S5PV210_GPF2(0); gpio <= S5PV210_GPF2(7); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+
+        for (gpio = S5PV210_GPF3(0); gpio <= S5PV210_GPF3(3); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+
+        /* Set DISPLAY_CONTROL register for Display path selection.
+         *
+         * ouput   |   RGB   |   I80   |   ITU
+         * -----------------------------------
+         *  00     |   MIE   |  FIMD   |  FIMD
+         *  01     | MDNIE   | MDNIE   |  FIMD
+         *  10     |  FIMD   |  FIMD   |  FIMD
+         *  11     |  FIMD   |  FIMD   |  FIMD
+         */
+        writel(0x2, S5P_MDNIE_SEL);
+}
diff --git a/arch/arm/mach-s5pv210/setup-i2c0.c b/arch/arm/mach-s5pv210/setup-i2c0.c
index 9ec6845840e5..c718253c70b8 100644
--- a/arch/arm/mach-s5pv210/setup-i2c0.c
+++ b/arch/arm/mach-s5pv210/setup-i2c0.c
@@ -1,6 +1,6 @@
 /* linux/arch/arm/mach-s5pv210/setup-i2c0.c
  *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com/
  *
  * I2C0 GPIO configuration.
@@ -17,9 +17,14 @@
 
 struct platform_device; /* don't need the contents */
 
+#include <mach/gpio.h>
 #include <plat/iic.h>
+#include <plat/gpio-cfg.h>
 
 void s3c_i2c0_cfg_gpio(struct platform_device *dev)
 {
-        /* Will be populated later */
+        s3c_gpio_cfgpin(S5PV210_GPD1(0), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV210_GPD1(0), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S5PV210_GPD1(1), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV210_GPD1(1), S3C_GPIO_PULL_UP);
 }
diff --git a/arch/arm/mach-s5pv210/setup-i2c1.c b/arch/arm/mach-s5pv210/setup-i2c1.c
new file mode 100644
index 000000000000..45e0e6ed2ed0
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-i2c1.c
@@ -0,0 +1,30 @@
+/* linux/arch/arm/mach-s5pv210/setup-i2c1.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * I2C1 GPIO configuration.
+ *
+ * Based on plat-s3c64xx/setup-i2c1.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+
+struct platform_device; /* don't need the contents */
+
+#include <mach/gpio.h>
+#include <plat/iic.h>
+#include <plat/gpio-cfg.h>
+
+void s3c_i2c1_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(S5PV210_GPD1(2), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV210_GPD1(2), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S5PV210_GPD1(3), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV210_GPD1(3), S3C_GPIO_PULL_UP);
+}
diff --git a/arch/arm/mach-s5pv210/setup-i2c2.c b/arch/arm/mach-s5pv210/setup-i2c2.c
new file mode 100644
index 000000000000..b11b4bff69ac
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-i2c2.c
@@ -0,0 +1,30 @@
+/* linux/arch/arm/mach-s5pv210/setup-i2c2.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * I2C2 GPIO configuration.
+ *
+ * Based on plat-s3c64xx/setup-i2c0.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+
+struct platform_device; /* don't need the contents */
+
+#include <mach/gpio.h>
+#include <plat/iic.h>
+#include <plat/gpio-cfg.h>
+
+void s3c_i2c2_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(S5PV210_GPD1(4), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV210_GPD1(4), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S5PV210_GPD1(5), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV210_GPD1(5), S3C_GPIO_PULL_UP);
+}
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
new file mode 100644
index 000000000000..fe7d86dad14c
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
@@ -0,0 +1,104 @@
+/* linux/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/card.h>
+
+#include <mach/gpio.h>
+#include <plat/gpio-cfg.h>
+#include <plat/regs-sdhci.h>
+
+void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
+{
+        unsigned int gpio;
+
+        /* Set all the necessary GPG0/GPG1 pins to special-function 2 */
+        for (gpio = S5PV210_GPG0(0); gpio < S5PV210_GPG0(2); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+        switch (width) {
+        case 8:
+                /* GPG1[3:6] special-funtion 3 */
+                for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) {
+                        s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+                        s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                }
+        case 4:
+                /* GPG0[3:6] special-funtion 2 */
+                for (gpio = S5PV210_GPG0(3); gpio <= S5PV210_GPG0(6); gpio++) {
+                        s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                        s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                }
+        default:
+                break;
+        }
+
+        s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2));
+}
+
+void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
+{
+        unsigned int gpio;
+
+        /* Set all the necessary GPG1[0:1] pins to special-function 2 */
+        for (gpio = S5PV210_GPG1(0); gpio < S5PV210_GPG1(2); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        /* Data pin GPG1[3:6] to special-function 2 */
+        for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S5PV210_GPG1(2), S3C_GPIO_SFN(2));
+}
+
+void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
+{
+        unsigned int gpio;
+
+        /* Set all the necessary GPG2[0:1] pins to special-function 2 */
+        for (gpio = S5PV210_GPG2(0); gpio < S5PV210_GPG2(2); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        switch (width) {
+        case 8:
+                /* Data pin GPG3[3:6] to special-function 3 */
+                for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) {
+                        s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+                        s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                }
+        case 4:
+                /* Data pin GPG2[3:6] to special-function 2 */
+                for (gpio = S5PV210_GPG2(3); gpio <= S5PV210_GPG2(6); gpio++) {
+                        s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                        s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                }
+        default:
+                break;
+        }
+
+        s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2));
+}
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
new file mode 100644
index 000000000000..51815ec60c2a
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-sdhci.c
@@ -0,0 +1,63 @@
+/* linux/arch/arm/mach-s5pv210/setup-sdhci.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Helper functions for settign up SDHCI device(s) (HSMMC)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#include <linux/mmc/card.h>
+#include <linux/mmc/host.h>
+
+#include <plat/regs-sdhci.h>
+#include <plat/sdhci.h>
+
+/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
+
+char *s5pv210_hsmmc_clksrcs[4] = {
+        [0] = "hsmmc",          /* HCLK */
+        [1] = "hsmmc",          /* HCLK */
+        [2] = "sclk_mmc",       /* mmc_bus */
+        /*[4] = reserved */
+};
+
+void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
+                                    void __iomem *r,
+                                    struct mmc_ios *ios,
+                                    struct mmc_card *card)
+{
+        u32 ctrl2, ctrl3;
+
+        /* don't need to alter anything acording to card-type */
+
+        writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
+
+        ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
+        ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
+        ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
+                  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
+                  S3C_SDHCI_CTRL2_ENFBCLKRX |
+                  S3C_SDHCI_CTRL2_DFCNT_NONE |
+                  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
+
+        if (ios->clock < 25 * 1000000)
+                ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
+                         S3C_SDHCI_CTRL3_FCSEL2 |
+                         S3C_SDHCI_CTRL3_FCSEL1 |
+                         S3C_SDHCI_CTRL3_FCSEL0);
+        else
+                ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
+
+        writel(ctrl2, r + S3C_SDHCI_CONTROL2);
+        writel(ctrl3, r + S3C_SDHCI_CONTROL3);
+}