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authorArnd Bergmann <arnd@arndb.de>2011-10-31 18:25:41 -0400
committerArnd Bergmann <arnd@arndb.de>2011-10-31 18:25:41 -0400
commit3e965b176341b78620f7404fd8b7f9a0d061f8a2 (patch)
treea2dbf06d6ae20fbe417b70f0a471cc4f93ff0a71 /arch/arm/mach-s5pv210
parent034ee299122c6b145d6d3cafb9ef5c329a4ab990 (diff)
parent5839fec9d8db35b2b07359b18a77295418e239ad (diff)
Merge branch 'next/fixes' into next/cleanup
Conflicts: arch/arm/mach-mxs/include/mach/gpio.h arch/arm/plat-mxc/include/mach/gpio.h drivers/video/omap/lcd_apollon.c drivers/video/omap/lcd_ldp.c drivers/video/omap/lcd_overo.c
Diffstat (limited to 'arch/arm/mach-s5pv210')
-rw-r--r--arch/arm/mach-s5pv210/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/gpio.h7
2 files changed, 1 insertions, 8 deletions
diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
index 169fe654a59e..79e55597ab63 100644
--- a/arch/arm/mach-s5pv210/include/mach/debug-macro.S
+++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
@@ -21,7 +21,7 @@
21 * aligned and add in the offset when we load the value here. 21 * aligned and add in the offset when we load the value here.
22 */ 22 */
23 23
24 .macro addruart, rp, rv 24 .macro addruart, rp, rv, tmp
25 ldr \rp, = S3C_PA_UART 25 ldr \rp, = S3C_PA_UART
26 ldr \rv, = S3C_VA_UART 26 ldr \rv, = S3C_VA_UART
27#if CONFIG_DEBUG_S3C_UART != 0 27#if CONFIG_DEBUG_S3C_UART != 0
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
index a5a1e331f8ed..6c8b903c02e4 100644
--- a/arch/arm/mach-s5pv210/include/mach/gpio.h
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -13,11 +13,6 @@
13#ifndef __ASM_ARCH_GPIO_H 13#ifndef __ASM_ARCH_GPIO_H
14#define __ASM_ARCH_GPIO_H __FILE__ 14#define __ASM_ARCH_GPIO_H __FILE__
15 15
16#define gpio_get_value __gpio_get_value
17#define gpio_set_value __gpio_set_value
18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq
20
21/* Practically, GPIO banks up to MP03 are the configurable gpio banks */ 16/* Practically, GPIO banks up to MP03 are the configurable gpio banks */
22 17
23/* GPIO bank sizes */ 18/* GPIO bank sizes */
@@ -142,6 +137,4 @@ enum s5p_gpio_number {
142#define ARCH_NR_GPIOS (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + \ 137#define ARCH_NR_GPIOS (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + \
143 CONFIG_SAMSUNG_GPIO_EXTRA + 1) 138 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
144 139
145#include <asm-generic/gpio.h>
146
147#endif /* __ASM_ARCH_GPIO_H */ 140#endif /* __ASM_ARCH_GPIO_H */