ARM: S5P: Add support for MFC device

Add support for MFC device to plat-s5p, mach-exynos4, mach-s5pv210:
 - clock support
 - memory mapping and reserving
 - s5p_device_mfc platform device

Signed-off-by: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

2 files changed, 10 insertions, 0 deletions

diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index b5c95e663c53..1404a4c43770 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -324,6 +324,12 @@ static struct clk init_clocks_off[] = {
                 .enable         = s5pv210_clk_ip0_ctrl,
                 .ctrlbit        = (1 << 26),
         }, {
+                .name           = "mfc",
+                .devname        = "s5p-mfc",
+                .parent         = &clk_pclk_psys.clk,
+                .enable         = s5pv210_clk_ip0_ctrl,
+                .ctrlbit        = (1 << 16),
+        }, {
                 .name           = "otg",
                 .parent         = &clk_hclk_psys.clk,
                 .enable         = s5pv210_clk_ip1_ctrl,
@@ -914,6 +920,7 @@ static struct clksrc_clk clksrcs[] = {
         }, {
                 .clk            = {
                         .name           = "sclk_mfc",
+                        .devname        = "s5p-mfc",
                         .enable         = s5pv210_clk_ip0_ctrl,
                         .ctrlbit        = (1 << 16),
                 },
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 1dd58836fd4f..aac343c180b2 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -59,6 +59,8 @@
 
 #define S5PV210_PA_CFCON                0xE8200000
 
+#define S5PV210_PA_MFC                  0xF1700000
+
 #define S5PV210_PA_HSMMC(x)             (0xEB000000 + ((x) * 0x100000))
 
 #define S5PV210_PA_HSOTG                0xEC000000
@@ -107,6 +109,7 @@
 #define S5P_PA_FIMC1                    S5PV210_PA_FIMC1
 #define S5P_PA_FIMC2                    S5PV210_PA_FIMC2
 #define S5P_PA_MIPI_CSIS0               S5PV210_PA_MIPI_CSIS
+#define S5P_PA_MFC                      S5PV210_PA_MFC
 #define S5P_PA_ONENAND                  S5PC110_PA_ONENAND
 #define S5P_PA_ONENAND_DMA              S5PC110_PA_ONENAND_DMA
 #define S5P_PA_SDRAM                    S5PV210_PA_SDRAM