diff options
author | Jassi Brar <jassi.brar@samsung.com> | 2010-05-18 03:43:37 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2010-05-20 06:31:10 -0400 |
commit | f0c303a68701a5df53a8672eb81a85c8a41096da (patch) | |
tree | 9aea14ed46b842ea33693ca193e964724d83333a /arch/arm/mach-s5pv210 | |
parent | 7c3943f6d3625a2823262842e18387c4079a3f84 (diff) |
ARM: S5PV210: Define SPI platform devices
Define SPI platform devices for the SoC.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s5pv210')
-rw-r--r-- | arch/arm/mach-s5pv210/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/dev-spi.c | 178 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/map.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/spi-clocks.h | 17 |
4 files changed, 200 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 99827813d293..ba0d7091343b 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile | |||
@@ -23,3 +23,4 @@ obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o | |||
23 | # device support | 23 | # device support |
24 | 24 | ||
25 | obj-y += dev-audio.o | 25 | obj-y += dev-audio.o |
26 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c new file mode 100644 index 000000000000..337a62b57a0b --- /dev/null +++ b/arch/arm/mach-s5pv210/dev-spi.c | |||
@@ -0,0 +1,178 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/dev-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | |||
14 | #include <mach/dma.h> | ||
15 | #include <mach/map.h> | ||
16 | #include <mach/irqs.h> | ||
17 | #include <mach/gpio.h> | ||
18 | #include <mach/spi-clocks.h> | ||
19 | |||
20 | #include <plat/s3c64xx-spi.h> | ||
21 | #include <plat/gpio-cfg.h> | ||
22 | |||
23 | static char *spi_src_clks[] = { | ||
24 | [S5PV210_SPI_SRCCLK_PCLK] = "pclk", | ||
25 | [S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi", | ||
26 | }; | ||
27 | |||
28 | /* SPI Controller platform_devices */ | ||
29 | |||
30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
32 | * be either some immediate GPIO or some signal out of some other | ||
33 | * chip in between ... or some yet another way. | ||
34 | * We simply do not assume anything about CS. | ||
35 | */ | ||
36 | static int s5pv210_spi_cfg_gpio(struct platform_device *pdev) | ||
37 | { | ||
38 | switch (pdev->id) { | ||
39 | case 0: | ||
40 | s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2)); | ||
41 | s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(2)); | ||
42 | s3c_gpio_cfgpin(S5PV210_GPB(2), S3C_GPIO_SFN(2)); | ||
43 | s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP); | ||
44 | s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP); | ||
45 | s3c_gpio_setpull(S5PV210_GPB(2), S3C_GPIO_PULL_UP); | ||
46 | break; | ||
47 | |||
48 | case 1: | ||
49 | s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2)); | ||
50 | s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(2)); | ||
51 | s3c_gpio_cfgpin(S5PV210_GPB(6), S3C_GPIO_SFN(2)); | ||
52 | s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP); | ||
53 | s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP); | ||
54 | s3c_gpio_setpull(S5PV210_GPB(6), S3C_GPIO_PULL_UP); | ||
55 | break; | ||
56 | |||
57 | default: | ||
58 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
59 | return -EINVAL; | ||
60 | } | ||
61 | |||
62 | return 0; | ||
63 | } | ||
64 | |||
65 | static struct resource s5pv210_spi0_resource[] = { | ||
66 | [0] = { | ||
67 | .start = S5PV210_PA_SPI0, | ||
68 | .end = S5PV210_PA_SPI0 + 0x100 - 1, | ||
69 | .flags = IORESOURCE_MEM, | ||
70 | }, | ||
71 | [1] = { | ||
72 | .start = DMACH_SPI0_TX, | ||
73 | .end = DMACH_SPI0_TX, | ||
74 | .flags = IORESOURCE_DMA, | ||
75 | }, | ||
76 | [2] = { | ||
77 | .start = DMACH_SPI0_RX, | ||
78 | .end = DMACH_SPI0_RX, | ||
79 | .flags = IORESOURCE_DMA, | ||
80 | }, | ||
81 | [3] = { | ||
82 | .start = IRQ_SPI0, | ||
83 | .end = IRQ_SPI0, | ||
84 | .flags = IORESOURCE_IRQ, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | static struct s3c64xx_spi_info s5pv210_spi0_pdata = { | ||
89 | .cfg_gpio = s5pv210_spi_cfg_gpio, | ||
90 | .fifo_lvl_mask = 0x1ff, | ||
91 | .rx_lvl_offset = 15, | ||
92 | .high_speed = 1, | ||
93 | }; | ||
94 | |||
95 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
96 | |||
97 | struct platform_device s5pv210_device_spi0 = { | ||
98 | .name = "s3c64xx-spi", | ||
99 | .id = 0, | ||
100 | .num_resources = ARRAY_SIZE(s5pv210_spi0_resource), | ||
101 | .resource = s5pv210_spi0_resource, | ||
102 | .dev = { | ||
103 | .dma_mask = &spi_dmamask, | ||
104 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
105 | .platform_data = &s5pv210_spi0_pdata, | ||
106 | }, | ||
107 | }; | ||
108 | |||
109 | static struct resource s5pv210_spi1_resource[] = { | ||
110 | [0] = { | ||
111 | .start = S5PV210_PA_SPI1, | ||
112 | .end = S5PV210_PA_SPI1 + 0x100 - 1, | ||
113 | .flags = IORESOURCE_MEM, | ||
114 | }, | ||
115 | [1] = { | ||
116 | .start = DMACH_SPI1_TX, | ||
117 | .end = DMACH_SPI1_TX, | ||
118 | .flags = IORESOURCE_DMA, | ||
119 | }, | ||
120 | [2] = { | ||
121 | .start = DMACH_SPI1_RX, | ||
122 | .end = DMACH_SPI1_RX, | ||
123 | .flags = IORESOURCE_DMA, | ||
124 | }, | ||
125 | [3] = { | ||
126 | .start = IRQ_SPI1, | ||
127 | .end = IRQ_SPI1, | ||
128 | .flags = IORESOURCE_IRQ, | ||
129 | }, | ||
130 | }; | ||
131 | |||
132 | static struct s3c64xx_spi_info s5pv210_spi1_pdata = { | ||
133 | .cfg_gpio = s5pv210_spi_cfg_gpio, | ||
134 | .fifo_lvl_mask = 0x7f, | ||
135 | .rx_lvl_offset = 15, | ||
136 | .high_speed = 1, | ||
137 | }; | ||
138 | |||
139 | struct platform_device s5pv210_device_spi1 = { | ||
140 | .name = "s3c64xx-spi", | ||
141 | .id = 1, | ||
142 | .num_resources = ARRAY_SIZE(s5pv210_spi1_resource), | ||
143 | .resource = s5pv210_spi1_resource, | ||
144 | .dev = { | ||
145 | .dma_mask = &spi_dmamask, | ||
146 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
147 | .platform_data = &s5pv210_spi1_pdata, | ||
148 | }, | ||
149 | }; | ||
150 | |||
151 | void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
152 | { | ||
153 | struct s3c64xx_spi_info *pd; | ||
154 | |||
155 | /* Reject invalid configuration */ | ||
156 | if (!num_cs || src_clk_nr < 0 | ||
157 | || src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) { | ||
158 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
159 | return; | ||
160 | } | ||
161 | |||
162 | switch (cntrlr) { | ||
163 | case 0: | ||
164 | pd = &s5pv210_spi0_pdata; | ||
165 | break; | ||
166 | case 1: | ||
167 | pd = &s5pv210_spi1_pdata; | ||
168 | break; | ||
169 | default: | ||
170 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
171 | __func__, cntrlr); | ||
172 | return; | ||
173 | } | ||
174 | |||
175 | pd->num_cs = num_cs; | ||
176 | pd->src_clk_nr = src_clk_nr; | ||
177 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
178 | } | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index 5adcb9f26e44..9ab0069d1a7e 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h | |||
@@ -25,6 +25,10 @@ | |||
25 | #define S5PV210_PA_GPIO (0xE0200000) | 25 | #define S5PV210_PA_GPIO (0xE0200000) |
26 | #define S5P_PA_GPIO S5PV210_PA_GPIO | 26 | #define S5P_PA_GPIO S5PV210_PA_GPIO |
27 | 27 | ||
28 | /* SPI */ | ||
29 | #define S5PV210_PA_SPI0 0xE1300000 | ||
30 | #define S5PV210_PA_SPI1 0xE1400000 | ||
31 | |||
28 | #define S5PV210_PA_IIC0 (0xE1800000) | 32 | #define S5PV210_PA_IIC0 (0xE1800000) |
29 | 33 | ||
30 | #define S5PV210_PA_TIMER (0xE2500000) | 34 | #define S5PV210_PA_TIMER (0xE2500000) |
diff --git a/arch/arm/mach-s5pv210/include/mach/spi-clocks.h b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h new file mode 100644 index 000000000000..02acded5f73d --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h | |||
@@ -0,0 +1,17 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __S5PV210_PLAT_SPI_CLKS_H | ||
12 | #define __S5PV210_PLAT_SPI_CLKS_H __FILE__ | ||
13 | |||
14 | #define S5PV210_SPI_SRCCLK_PCLK 0 | ||
15 | #define S5PV210_SPI_SRCCLK_SCLK 1 | ||
16 | |||
17 | #endif /* __S5PV210_PLAT_SPI_CLKS_H */ | ||