aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s5pv210/setup-spi.c
diff options
context:
space:
mode:
authorThomas Abraham <thomas.abraham@linaro.org>2012-07-12 18:15:14 -0400
committerKukjin Kim <kgene.kim@samsung.com>2012-07-13 02:23:46 -0400
commita5238e360b715e9a1bb39d7d3537f78cc9e9e286 (patch)
treeb6503a7429b93b7c15f90d5e3b0124a191215423 /arch/arm/mach-s5pv210/setup-spi.c
parent2b54be661191532ddf1628c3b151b81ae8743caa (diff)
spi: s3c64xx: move controller information into driver data
Platform data is used to specify controller hardware specific information such as the tx/rx fifo level mask and bit offset of rx fifo level. Such information is not suitable to be supplied from device tree. Instead, it can be moved into the driver data and removed from platform data. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv210/setup-spi.c')
-rw-r--r--arch/arm/mach-s5pv210/setup-spi.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm/mach-s5pv210/setup-spi.c b/arch/arm/mach-s5pv210/setup-spi.c
index f43c5048a37d..2cd66a632791 100644
--- a/arch/arm/mach-s5pv210/setup-spi.c
+++ b/arch/arm/mach-s5pv210/setup-spi.c
@@ -12,16 +12,8 @@
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13 13
14#include <plat/gpio-cfg.h> 14#include <plat/gpio-cfg.h>
15#include <plat/s3c64xx-spi.h>
16 15
17#ifdef CONFIG_S3C64XX_DEV_SPI0 16#ifdef CONFIG_S3C64XX_DEV_SPI0
18struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
19 .fifo_lvl_mask = 0x1ff,
20 .rx_lvl_offset = 15,
21 .high_speed = 1,
22 .tx_st_done = 25,
23};
24
25int s3c64xx_spi0_cfg_gpio(struct platform_device *dev) 17int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
26{ 18{
27 s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2)); 19 s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2));
@@ -33,13 +25,6 @@ int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
33#endif 25#endif
34 26
35#ifdef CONFIG_S3C64XX_DEV_SPI1 27#ifdef CONFIG_S3C64XX_DEV_SPI1
36struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
37 .fifo_lvl_mask = 0x7f,
38 .rx_lvl_offset = 15,
39 .high_speed = 1,
40 .tx_st_done = 25,
41};
42
43int s3c64xx_spi1_cfg_gpio(struct platform_device *dev) 28int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
44{ 29{
45 s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2)); 30 s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2));