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authorJongpill Lee <boyko.lee@samsung.com>2010-10-02 06:13:42 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-10-20 18:54:57 -0400
commitea31fd4330c823bd156d6484e32a0777c35f200f (patch)
tree1db9c8140448d53a8f404b3581af31d78cd3872a /arch/arm/mach-s5pv210/pm.c
parentdc425471b6d4e2a3c1d74745433816fc313f30e7 (diff)
ARM: S5PV210: Add Power Management Support
This patch adds suspend-to-ram support for S5PV210. Note. This patch is confirmed on SMDKV210 and SMDKC110 board. Signed-off-by: Jongpill Lee <boyko.lee@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv210/pm.c')
-rw-r--r--arch/arm/mach-s5pv210/pm.c166
1 files changed, 166 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c
new file mode 100644
index 000000000000..549d7924fd4c
--- /dev/null
+++ b/arch/arm/mach-s5pv210/pm.c
@@ -0,0 +1,166 @@
1/* linux/arch/arm/mach-s5pv210/pm.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5PV210 - Power Management support
7 *
8 * Based on arch/arm/mach-s3c2410/pm.c
9 * Copyright (c) 2006 Simtec Electronics
10 * Ben Dooks <ben@simtec.co.uk>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17#include <linux/init.h>
18#include <linux/suspend.h>
19#include <linux/io.h>
20
21#include <plat/cpu.h>
22#include <plat/pm.h>
23#include <plat/regs-timer.h>
24
25#include <mach/regs-irq.h>
26#include <mach/regs-clock.h>
27
28static struct sleep_save s5pv210_core_save[] = {
29 /* Clock source */
30 SAVE_ITEM(S5P_CLK_SRC0),
31 SAVE_ITEM(S5P_CLK_SRC1),
32 SAVE_ITEM(S5P_CLK_SRC2),
33 SAVE_ITEM(S5P_CLK_SRC3),
34 SAVE_ITEM(S5P_CLK_SRC4),
35 SAVE_ITEM(S5P_CLK_SRC5),
36 SAVE_ITEM(S5P_CLK_SRC6),
37
38 /* Clock source Mask */
39 SAVE_ITEM(S5P_CLK_SRC_MASK0),
40 SAVE_ITEM(S5P_CLK_SRC_MASK1),
41
42 /* Clock Divider */
43 SAVE_ITEM(S5P_CLK_DIV0),
44 SAVE_ITEM(S5P_CLK_DIV1),
45 SAVE_ITEM(S5P_CLK_DIV2),
46 SAVE_ITEM(S5P_CLK_DIV3),
47 SAVE_ITEM(S5P_CLK_DIV4),
48 SAVE_ITEM(S5P_CLK_DIV5),
49 SAVE_ITEM(S5P_CLK_DIV6),
50 SAVE_ITEM(S5P_CLK_DIV7),
51
52 /* Clock Main Gate */
53 SAVE_ITEM(S5P_CLKGATE_MAIN0),
54 SAVE_ITEM(S5P_CLKGATE_MAIN1),
55 SAVE_ITEM(S5P_CLKGATE_MAIN2),
56
57 /* Clock source Peri Gate */
58 SAVE_ITEM(S5P_CLKGATE_PERI0),
59 SAVE_ITEM(S5P_CLKGATE_PERI1),
60
61 /* Clock source SCLK Gate */
62 SAVE_ITEM(S5P_CLKGATE_SCLK0),
63 SAVE_ITEM(S5P_CLKGATE_SCLK1),
64
65 /* Clock IP Clock gate */
66 SAVE_ITEM(S5P_CLKGATE_IP0),
67 SAVE_ITEM(S5P_CLKGATE_IP1),
68 SAVE_ITEM(S5P_CLKGATE_IP2),
69 SAVE_ITEM(S5P_CLKGATE_IP3),
70 SAVE_ITEM(S5P_CLKGATE_IP4),
71
72 /* Clock Blcok and Bus gate */
73 SAVE_ITEM(S5P_CLKGATE_BLOCK),
74 SAVE_ITEM(S5P_CLKGATE_BUS0),
75
76 /* Clock ETC */
77 SAVE_ITEM(S5P_CLK_OUT),
78 SAVE_ITEM(S5P_MDNIE_SEL),
79
80 /* PWM Register */
81 SAVE_ITEM(S3C2410_TCFG0),
82 SAVE_ITEM(S3C2410_TCFG1),
83 SAVE_ITEM(S3C64XX_TINT_CSTAT),
84 SAVE_ITEM(S3C2410_TCON),
85 SAVE_ITEM(S3C2410_TCNTB(0)),
86 SAVE_ITEM(S3C2410_TCMPB(0)),
87 SAVE_ITEM(S3C2410_TCNTO(0)),
88};
89
90void s5pv210_cpu_suspend(void)
91{
92 unsigned long tmp;
93
94 /* issue the standby signal into the pm unit. Note, we
95 * issue a write-buffer drain just in case */
96
97 tmp = 0;
98
99 asm("b 1f\n\t"
100 ".align 5\n\t"
101 "1:\n\t"
102 "mcr p15, 0, %0, c7, c10, 5\n\t"
103 "mcr p15, 0, %0, c7, c10, 4\n\t"
104 "wfi" : : "r" (tmp));
105
106 /* we should never get past here */
107 panic("sleep resumed to originator?");
108}
109
110static void s5pv210_pm_prepare(void)
111{
112 unsigned int tmp;
113
114 /* ensure at least INFORM0 has the resume address */
115 __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);
116
117 tmp = __raw_readl(S5P_SLEEP_CFG);
118 tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
119 __raw_writel(tmp, S5P_SLEEP_CFG);
120
121 /* WFI for SLEEP mode configuration by SYSCON */
122 tmp = __raw_readl(S5P_PWR_CFG);
123 tmp &= S5P_CFG_WFI_CLEAN;
124 tmp |= S5P_CFG_WFI_SLEEP;
125 __raw_writel(tmp, S5P_PWR_CFG);
126
127 /* SYSCON interrupt handling disable */
128 tmp = __raw_readl(S5P_OTHERS);
129 tmp |= S5P_OTHER_SYSC_INTOFF;
130 __raw_writel(tmp, S5P_OTHERS);
131
132 s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
133}
134
135static int s5pv210_pm_add(struct sys_device *sysdev)
136{
137 pm_cpu_prep = s5pv210_pm_prepare;
138 pm_cpu_sleep = s5pv210_cpu_suspend;
139
140 return 0;
141}
142
143static int s5pv210_pm_resume(struct sys_device *dev)
144{
145 u32 tmp;
146
147 tmp = __raw_readl(S5P_OTHERS);
148 tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\
149 S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART);
150 __raw_writel(tmp , S5P_OTHERS);
151
152 s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
153
154 return 0;
155}
156
157static struct sysdev_driver s5pv210_pm_driver = {
158 .add = s5pv210_pm_add,
159 .resume = s5pv210_pm_resume,
160};
161
162static __init int s5pv210_pm_drvinit(void)
163{
164 return sysdev_driver_register(&s5pv210_sysclass, &s5pv210_pm_driver);
165}
166arch_initcall(s5pv210_pm_drvinit);