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authorKukjin Kim <kgene.kim@samsung.com>2010-07-20 20:19:51 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-08-05 05:30:21 -0400
commitc8def0857f93413db795ce3586bcc3c3eaae7088 (patch)
treec1fce262d95ea73924f97379e035f080de680493 /arch/arm/mach-s5pv210/mach-smdkc110.c
parent02a0456b3b6ad7503a37fab6f00a27d2bd53d483 (diff)
ARM: S5P: Changes the definition name of default UART registers
This patch changes the definition name of default UCON, ULCON, and UFCON UART registers from ARCH(SoC) to Machine(Board). Because it depends on machine. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv210/mach-smdkc110.c')
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index 4c8903c6d104..7878f695f2ce 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -27,16 +27,16 @@
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28 28
29/* Following are default values for UCON, ULCON and UFCON UART registers */ 29/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 30#define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \ 31 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \ 32 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \ 33 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \ 34 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN) 35 S3C2443_UCON_RXERR_IRQEN)
36 36
37#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 37#define SMDKC110_ULCON_DEFAULT S3C2410_LCON_CS8
38 38
39#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ 39#define SMDKC110_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
40 S5PV210_UFCON_TXTRIG4 | \ 40 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4) 41 S5PV210_UFCON_RXTRIG4)
42 42
@@ -44,30 +44,30 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
44 [0] = { 44 [0] = {
45 .hwport = 0, 45 .hwport = 0,
46 .flags = 0, 46 .flags = 0,
47 .ucon = S5PV210_UCON_DEFAULT, 47 .ucon = SMDKC110_UCON_DEFAULT,
48 .ulcon = S5PV210_ULCON_DEFAULT, 48 .ulcon = SMDKC110_ULCON_DEFAULT,
49 .ufcon = S5PV210_UFCON_DEFAULT, 49 .ufcon = SMDKC110_UFCON_DEFAULT,
50 }, 50 },
51 [1] = { 51 [1] = {
52 .hwport = 1, 52 .hwport = 1,
53 .flags = 0, 53 .flags = 0,
54 .ucon = S5PV210_UCON_DEFAULT, 54 .ucon = SMDKC110_UCON_DEFAULT,
55 .ulcon = S5PV210_ULCON_DEFAULT, 55 .ulcon = SMDKC110_ULCON_DEFAULT,
56 .ufcon = S5PV210_UFCON_DEFAULT, 56 .ufcon = SMDKC110_UFCON_DEFAULT,
57 }, 57 },
58 [2] = { 58 [2] = {
59 .hwport = 2, 59 .hwport = 2,
60 .flags = 0, 60 .flags = 0,
61 .ucon = S5PV210_UCON_DEFAULT, 61 .ucon = SMDKC110_UCON_DEFAULT,
62 .ulcon = S5PV210_ULCON_DEFAULT, 62 .ulcon = SMDKC110_ULCON_DEFAULT,
63 .ufcon = S5PV210_UFCON_DEFAULT, 63 .ufcon = SMDKC110_UFCON_DEFAULT,
64 }, 64 },
65 [3] = { 65 [3] = {
66 .hwport = 3, 66 .hwport = 3,
67 .flags = 0, 67 .flags = 0,
68 .ucon = S5PV210_UCON_DEFAULT, 68 .ucon = SMDKC110_UCON_DEFAULT,
69 .ulcon = S5PV210_ULCON_DEFAULT, 69 .ulcon = SMDKC110_ULCON_DEFAULT,
70 .ufcon = S5PV210_UFCON_DEFAULT, 70 .ufcon = SMDKC110_UFCON_DEFAULT,
71 }, 71 },
72}; 72};
73 73