diff options
author | Jongpill Lee <boyko.lee@samsung.com> | 2010-03-19 02:33:31 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2010-05-10 20:32:40 -0400 |
commit | b78232da3f85950a207bbcb64db46fd95b581465 (patch) | |
tree | 1f720264c25b4f98a7be792c9b7b19f7e61eb93c /arch/arm/mach-s5pv210/include | |
parent | dcd897dba163e746cd98d8290c5a18dc47157c64 (diff) |
ARM: S5PV210: Bug fix on PWM Timer
This patch fixes return value in below functions
- pwm_cfg_src_is_tclk
- tcfg_to_divisor
- pwm_tdiv_has_div1
- pwm_tdiv_div_bits
And this patch changes Copyright ordering.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s5pv210/include')
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/pwm-clock.h | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h index 69027fea987a..f8a9f1b330e0 100644 --- a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h | |||
@@ -1,13 +1,14 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h | 1 | /* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Copyright 2008 Openmoko, Inc. | ||
3 | * Copyright 2008 Simtec Electronics | 7 | * Copyright 2008 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 8 | * Ben Dooks <ben@simtec.co.uk> |
5 | * http://armlinux.simtec.co.uk/ | 9 | * http://armlinux.simtec.co.uk/ |
6 | * | 10 | * |
7 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 11 | * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h |
8 | * http://www.samsung.com/ | ||
9 | * | ||
10 | * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h | ||
11 | * | 12 | * |
12 | * S5PV210 - pwm clock and timer support | 13 | * S5PV210 - pwm clock and timer support |
13 | * | 14 | * |
@@ -21,14 +22,14 @@ | |||
21 | 22 | ||
22 | /** | 23 | /** |
23 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | 24 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk |
24 | * @cfg: The timer TCFG1 register bits shifted down to 0. | 25 | * @tcfg: The timer TCFG1 register bits shifted down to 0. |
25 | * | 26 | * |
26 | * Return true if the given configuration from TCFG1 is a TCLK instead | 27 | * Return true if the given configuration from TCFG1 is a TCLK instead |
27 | * any of the TDIV clocks. | 28 | * any of the TDIV clocks. |
28 | */ | 29 | */ |
29 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | 30 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) |
30 | { | 31 | { |
31 | return tcfg == S3C2410_TCFG1_MUX_TCLK; | 32 | return tcfg == S3C64XX_TCFG1_MUX_TCLK; |
32 | } | 33 | } |
33 | 34 | ||
34 | /** | 35 | /** |
@@ -40,7 +41,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | |||
40 | */ | 41 | */ |
41 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | 42 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) |
42 | { | 43 | { |
43 | return 1 << (1 + tcfg1); | 44 | return 1 << tcfg1; |
44 | } | 45 | } |
45 | 46 | ||
46 | /** | 47 | /** |
@@ -50,7 +51,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | |||
50 | */ | 51 | */ |
51 | static inline unsigned int pwm_tdiv_has_div1(void) | 52 | static inline unsigned int pwm_tdiv_has_div1(void) |
52 | { | 53 | { |
53 | return 0; | 54 | return 1; |
54 | } | 55 | } |
55 | 56 | ||
56 | /** | 57 | /** |
@@ -61,9 +62,9 @@ static inline unsigned int pwm_tdiv_has_div1(void) | |||
61 | */ | 62 | */ |
62 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | 63 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) |
63 | { | 64 | { |
64 | return ilog2(div) - 1; | 65 | return ilog2(div); |
65 | } | 66 | } |
66 | 67 | ||
67 | #define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK | 68 | #define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK |
68 | 69 | ||
69 | #endif /* __ASM_ARCH_PWMCLK_H */ | 70 | #endif /* __ASM_ARCH_PWMCLK_H */ |