diff options
author | Thomas Abraham <thomas.ab@samsung.com> | 2010-05-16 20:38:44 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2010-05-16 21:37:36 -0400 |
commit | 664f5b2065da188821fe5aa998c6351e8c042d98 (patch) | |
tree | 4284522929822a0c7bcc9dc13b9c8fdd466518cd /arch/arm/mach-s5pv210/clock.c | |
parent | 6ed91a202b3843d2fec51f00c31e65313ca00906 (diff) |
ARM: S5PV210: Fix clk_get_rate issue with the clk_h100 clock
The clk_h100 clock represents the IMEM clock for the MSYS domain.
This clock rate of this clock is always half of the hclk_msys clock.
There is an issue when getting the clock rate of the clk_h100 clock
(clock get_rate hclk_h100 always returns clock rate that is equal to
the hclk_msys clock rate).
This patch modifies the following.
1. Moves the definition of the clk_h100 clock into the 'init_clocks'
list with the appropriate parent, ctrlbit, enable and ops fields.
2. The name of the clock is changed from 'clk_h100' to 'hclk_imem'
to represent more clearly that is represents the IMEM clock in
the MSYS domain.
3. The function to get the clock rate of the hclk_imem clock is added.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s5pv210/clock.c')
-rw-r--r-- | arch/arm/mach-s5pv210/clock.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c index 4791642f3e6e..527c9c4262f1 100644 --- a/arch/arm/mach-s5pv210/clock.c +++ b/arch/arm/mach-s5pv210/clock.c | |||
@@ -155,11 +155,6 @@ static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable) | |||
155 | return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); | 155 | return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); |
156 | } | 156 | } |
157 | 157 | ||
158 | static struct clk clk_h100 = { | ||
159 | .name = "hclk100", | ||
160 | .id = -1, | ||
161 | }; | ||
162 | |||
163 | static struct clk clk_p83 = { | 158 | static struct clk clk_p83 = { |
164 | .name = "pclk83", | 159 | .name = "pclk83", |
165 | .id = -1, | 160 | .id = -1, |
@@ -171,11 +166,19 @@ static struct clk clk_p66 = { | |||
171 | }; | 166 | }; |
172 | 167 | ||
173 | static struct clk *sys_clks[] = { | 168 | static struct clk *sys_clks[] = { |
174 | &clk_h100, | ||
175 | &clk_p83, | 169 | &clk_p83, |
176 | &clk_p66 | 170 | &clk_p66 |
177 | }; | 171 | }; |
178 | 172 | ||
173 | static unsigned long s5pv210_clk_imem_get_rate(struct clk *clk) | ||
174 | { | ||
175 | return clk_get_rate(clk->parent) / 2; | ||
176 | } | ||
177 | |||
178 | static struct clk_ops clk_hclk_imem_ops = { | ||
179 | .get_rate = s5pv210_clk_imem_get_rate, | ||
180 | }; | ||
181 | |||
179 | static struct clk init_clocks_disable[] = { | 182 | static struct clk init_clocks_disable[] = { |
180 | { | 183 | { |
181 | .name = "rot", | 184 | .name = "rot", |
@@ -326,6 +329,13 @@ static struct clk init_clocks_disable[] = { | |||
326 | 329 | ||
327 | static struct clk init_clocks[] = { | 330 | static struct clk init_clocks[] = { |
328 | { | 331 | { |
332 | .name = "hclk_imem", | ||
333 | .id = -1, | ||
334 | .parent = &clk_hclk_msys.clk, | ||
335 | .ctrlbit = (1 << 5), | ||
336 | .enable = s5pv210_clk_ip0_ctrl, | ||
337 | .ops = &clk_hclk_imem_ops, | ||
338 | }, { | ||
329 | .name = "uart", | 339 | .name = "uart", |
330 | .id = 0, | 340 | .id = 0, |
331 | .parent = &clk_p66, | 341 | .parent = &clk_p66, |