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authorNaveen Krishna Chatradhi <ch.naveen@samsung.com>2011-07-18 01:44:19 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-07-20 13:10:04 -0400
commit65f5eaa27a0c18ab79489b2fcbaf28d97c45101a (patch)
tree60da2ca55bd8fa21e3dbf7e845a21a3dc8ff70e8 /arch/arm/mach-s5pc100
parent696f6fc1be92a8e117b4d07de34bf2d514a9c079 (diff)
ARM: SAMSUNG: Move duplicate code for SPDIF ops
Move the duplicated code for SPDIF ops from S5PV210 and S5PC100. So, the same can be used in EXYNOS4. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pc100')
-rw-r--r--arch/arm/mach-s5pc100/clock.c37
1 files changed, 1 insertions, 36 deletions
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index cd248e681377..ff5cbb30de5b 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -910,47 +910,12 @@ struct clksrc_sources clk_src_sclk_spdif = {
910 .nr_sources = ARRAY_SIZE(clk_sclk_spdif_list), 910 .nr_sources = ARRAY_SIZE(clk_sclk_spdif_list),
911}; 911};
912 912
913static int s5pc100_spdif_set_rate(struct clk *clk, unsigned long rate)
914{
915 struct clk *pclk;
916 int ret;
917
918 pclk = clk_get_parent(clk);
919 if (IS_ERR(pclk))
920 return -EINVAL;
921
922 ret = pclk->ops->set_rate(pclk, rate);
923 clk_put(pclk);
924
925 return ret;
926}
927
928static unsigned long s5pc100_spdif_get_rate(struct clk *clk)
929{
930 struct clk *pclk;
931 int rate;
932
933 pclk = clk_get_parent(clk);
934 if (IS_ERR(pclk))
935 return -EINVAL;
936
937 rate = pclk->ops->get_rate(clk);
938 clk_put(pclk);
939
940 return rate;
941}
942
943static struct clk_ops s5pc100_sclk_spdif_ops = {
944 .set_rate = s5pc100_spdif_set_rate,
945 .get_rate = s5pc100_spdif_get_rate,
946};
947
948static struct clksrc_clk clk_sclk_spdif = { 913static struct clksrc_clk clk_sclk_spdif = {
949 .clk = { 914 .clk = {
950 .name = "sclk_spdif", 915 .name = "sclk_spdif",
951 .ctrlbit = (1 << 11), 916 .ctrlbit = (1 << 11),
952 .enable = s5pc100_sclk1_ctrl, 917 .enable = s5pc100_sclk1_ctrl,
953 .ops = &s5pc100_sclk_spdif_ops, 918 .ops = &s5p_sclk_spdif_ops,
954 }, 919 },
955 .sources = &clk_src_sclk_spdif, 920 .sources = &clk_src_sclk_spdif,
956 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 24, .size = 2 }, 921 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 24, .size = 2 },