diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2010-08-06 08:34:55 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-08-06 08:34:55 -0400 |
commit | f2b7e3c54a304677a1142829fb5913595885379f (patch) | |
tree | 1eb941524c7325672f947dab525d96228b362e20 /arch/arm/mach-s5pc100 | |
parent | 6b8eda04ffdc24b68d379a32358f4f09a425a380 (diff) | |
parent | 0fdb480e7fb1ecdd4076ddf8b6ab16b0d77406c1 (diff) |
Merge branch 'next-s5p' into for-next
Conflicts:
arch/arm/mach-s5pv210/mach-aquila.c
arch/arm/mach-s5pv210/mach-goni.c
Diffstat (limited to 'arch/arm/mach-s5pc100')
-rw-r--r-- | arch/arm/mach-s5pc100/include/mach/irqs.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/include/mach/system.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/mach-smdkc100.c | 30 |
3 files changed, 17 insertions, 24 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h index bfcc0b9d7ad7..06513e647242 100644 --- a/arch/arm/mach-s5pc100/include/mach/irqs.h +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h | |||
@@ -29,7 +29,7 @@ | |||
29 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) | 29 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) |
30 | 30 | ||
31 | /* VIC1: ARM, power, memory, connectivity */ | 31 | /* VIC1: ARM, power, memory, connectivity */ |
32 | #define IRQ_CORTEX0 S5P_IRQ_VIC1(0) | 32 | #define IRQ_PMU S5P_IRQ_VIC1(0) |
33 | #define IRQ_CORTEX1 S5P_IRQ_VIC1(1) | 33 | #define IRQ_CORTEX1 S5P_IRQ_VIC1(1) |
34 | #define IRQ_CORTEX2 S5P_IRQ_VIC1(2) | 34 | #define IRQ_CORTEX2 S5P_IRQ_VIC1(2) |
35 | #define IRQ_CORTEX3 S5P_IRQ_VIC1(3) | 35 | #define IRQ_CORTEX3 S5P_IRQ_VIC1(3) |
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h index 681f626a9ae1..a9ea57c06600 100644 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ b/arch/arm/mach-s5pc100/include/mach/system.h | |||
@@ -11,18 +11,11 @@ | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | 11 | #ifndef __ASM_ARCH_SYSTEM_H |
12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | 12 | #define __ASM_ARCH_SYSTEM_H __FILE__ |
13 | 13 | ||
14 | #include <linux/io.h> | 14 | #include <plat/system-reset.h> |
15 | #include <mach/map.h> | ||
16 | #include <mach/regs-clock.h> | ||
17 | 15 | ||
18 | static void arch_idle(void) | 16 | static void arch_idle(void) |
19 | { | 17 | { |
20 | /* nothing here yet */ | 18 | /* nothing here yet */ |
21 | } | 19 | } |
22 | 20 | ||
23 | static void arch_reset(char mode, const char *cmd) | ||
24 | { | ||
25 | __raw_writel(S5PC100_SWRESET_RESETVAL, S5PC100_SWRESET); | ||
26 | return; | ||
27 | } | ||
28 | #endif /* __ASM_ARCH_IRQ_H */ | 21 | #endif /* __ASM_ARCH_IRQ_H */ |
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c index 83a5d648a980..a63c8a46571d 100644 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c | |||
@@ -49,16 +49,16 @@ | |||
49 | #include <plat/ts.h> | 49 | #include <plat/ts.h> |
50 | 50 | ||
51 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 51 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
52 | #define S5PC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 52 | #define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
53 | S3C2410_UCON_RXILEVEL | \ | 53 | S3C2410_UCON_RXILEVEL | \ |
54 | S3C2410_UCON_TXIRQMODE | \ | 54 | S3C2410_UCON_TXIRQMODE | \ |
55 | S3C2410_UCON_RXIRQMODE | \ | 55 | S3C2410_UCON_RXIRQMODE | \ |
56 | S3C2410_UCON_RXFIFO_TOI | \ | 56 | S3C2410_UCON_RXFIFO_TOI | \ |
57 | S3C2443_UCON_RXERR_IRQEN) | 57 | S3C2443_UCON_RXERR_IRQEN) |
58 | 58 | ||
59 | #define S5PC100_ULCON_DEFAULT S3C2410_LCON_CS8 | 59 | #define SMDKC100_ULCON_DEFAULT S3C2410_LCON_CS8 |
60 | 60 | ||
61 | #define S5PC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | 61 | #define SMDKC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
62 | S3C2440_UFCON_RXTRIG8 | \ | 62 | S3C2440_UFCON_RXTRIG8 | \ |
63 | S3C2440_UFCON_TXTRIG16) | 63 | S3C2440_UFCON_TXTRIG16) |
64 | 64 | ||
@@ -66,30 +66,30 @@ static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = { | |||
66 | [0] = { | 66 | [0] = { |
67 | .hwport = 0, | 67 | .hwport = 0, |
68 | .flags = 0, | 68 | .flags = 0, |
69 | .ucon = S5PC100_UCON_DEFAULT, | 69 | .ucon = SMDKC100_UCON_DEFAULT, |
70 | .ulcon = S5PC100_ULCON_DEFAULT, | 70 | .ulcon = SMDKC100_ULCON_DEFAULT, |
71 | .ufcon = S5PC100_UFCON_DEFAULT, | 71 | .ufcon = SMDKC100_UFCON_DEFAULT, |
72 | }, | 72 | }, |
73 | [1] = { | 73 | [1] = { |
74 | .hwport = 1, | 74 | .hwport = 1, |
75 | .flags = 0, | 75 | .flags = 0, |
76 | .ucon = S5PC100_UCON_DEFAULT, | 76 | .ucon = SMDKC100_UCON_DEFAULT, |
77 | .ulcon = S5PC100_ULCON_DEFAULT, | 77 | .ulcon = SMDKC100_ULCON_DEFAULT, |
78 | .ufcon = S5PC100_UFCON_DEFAULT, | 78 | .ufcon = SMDKC100_UFCON_DEFAULT, |
79 | }, | 79 | }, |
80 | [2] = { | 80 | [2] = { |
81 | .hwport = 2, | 81 | .hwport = 2, |
82 | .flags = 0, | 82 | .flags = 0, |
83 | .ucon = S5PC100_UCON_DEFAULT, | 83 | .ucon = SMDKC100_UCON_DEFAULT, |
84 | .ulcon = S5PC100_ULCON_DEFAULT, | 84 | .ulcon = SMDKC100_ULCON_DEFAULT, |
85 | .ufcon = S5PC100_UFCON_DEFAULT, | 85 | .ufcon = SMDKC100_UFCON_DEFAULT, |
86 | }, | 86 | }, |
87 | [3] = { | 87 | [3] = { |
88 | .hwport = 3, | 88 | .hwport = 3, |
89 | .flags = 0, | 89 | .flags = 0, |
90 | .ucon = S5PC100_UCON_DEFAULT, | 90 | .ucon = SMDKC100_UCON_DEFAULT, |
91 | .ulcon = S5PC100_ULCON_DEFAULT, | 91 | .ulcon = SMDKC100_ULCON_DEFAULT, |
92 | .ufcon = S5PC100_UFCON_DEFAULT, | 92 | .ufcon = SMDKC100_UFCON_DEFAULT, |
93 | }, | 93 | }, |
94 | }; | 94 | }; |
95 | 95 | ||