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authorMarek Szyprowski <m.szyprowski@samsung.com>2010-05-20 02:59:05 -0400
committerBen Dooks <ben-linux@fluff.org>2010-05-20 04:48:36 -0400
commit999304be1177d42d16bc59c546228c6ac5a3e76a (patch)
treeab8ba2b618484e93033bcc53fe0a4e014434d99f /arch/arm/mach-s5pc100/include
parent504d36e91ac12ccdb0e1193cee7bef9831a1c99e (diff)
ARM: SAMSUNG: Add platform support code for OneNAND controller
This patch adds setup code for Samsung OneNAND controller driver. The driver needs to be aware on which SoC it is running, so the actual device id is being changed in cpu init code. S3C64xx SoCs have 2 OneNAND controllers while S5PC100 and S5PC110 has only one. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [ben-linux@fluff.org: sort map.h entries] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s5pc100/include')
-rw-r--r--arch/arm/mach-s5pc100/include/mach/map.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index 4681ebe8bef6..aba3bb4e3412 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -31,6 +31,9 @@
31 * 31 *
32 */ 32 */
33 33
34#define S5PC100_PA_ONENAND_BUF (0xB0000000)
35#define S5PC100_SZ_ONENAND_BUF (SZ_256M - SZ_32M)
36
34/* Chip ID */ 37/* Chip ID */
35#define S5PC100_PA_CHIPID (0xE0000000) 38#define S5PC100_PA_CHIPID (0xE0000000)
36#define S5PC1XX_PA_CHIPID S5PC100_PA_CHIPID 39#define S5PC1XX_PA_CHIPID S5PC100_PA_CHIPID
@@ -60,6 +63,8 @@
60#define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) 63#define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET))
61#define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) 64#define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
62 65
66#define S5PC100_PA_ONENAND (0xE7100000)
67
63/* DMA */ 68/* DMA */
64#define S5PC100_PA_MDMA (0xE8100000) 69#define S5PC100_PA_MDMA (0xE8100000)
65#define S5PC100_PA_PDMA0 (0xE9000000) 70#define S5PC100_PA_PDMA0 (0xE9000000)
@@ -146,5 +151,8 @@
146#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC2 151#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC2
147#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD 152#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD
148#define S3C_PA_TSADC S5PC100_PA_TSADC 153#define S3C_PA_TSADC S5PC100_PA_TSADC
154#define S3C_PA_ONENAND S5PC100_PA_ONENAND
155#define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF
156#define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF
149 157
150#endif /* __ASM_ARCH_C100_MAP_H */ 158#endif /* __ASM_ARCH_C100_MAP_H */