diff options
author | Ben Dooks <ben-linux@fluff.org> | 2010-05-20 07:25:59 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2010-05-20 07:25:59 -0400 |
commit | 206a1a825dc67060ee319c99569755ba11250907 (patch) | |
tree | e4cdbd7b8b745e0ad4adfd59fa57c3bcabe3daf4 /arch/arm/mach-s5pc100/include/mach | |
parent | 6aeaad51aaecc9ebc8c1e8f132655e2ae8141f8c (diff) | |
parent | 999304be1177d42d16bc59c546228c6ac5a3e76a (diff) |
ARM: Merge for-2635-4/onenand
Merge branch 'for-2635-4/onenand' into for-2635-4/partial2
Conflicts:
arch/arm/mach-s5pc100/cpu.c
arch/arm/mach-s5pc100/include/mach/map.h
arch/arm/mach-s5pv210/Makefile
Diffstat (limited to 'arch/arm/mach-s5pc100/include/mach')
-rw-r--r-- | arch/arm/mach-s5pc100/include/mach/map.h | 68 |
1 files changed, 56 insertions, 12 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index 88009549ab28..a0b2fee332a1 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h | |||
@@ -16,6 +16,25 @@ | |||
16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
18 | 18 | ||
19 | /* | ||
20 | * map-base.h has already defined virtual memory address | ||
21 | * S3C_VA_IRQ S3C_ADDR(0x00000000) irq controller(s) | ||
22 | * S3C_VA_SYS S3C_ADDR(0x00100000) system control | ||
23 | * S3C_VA_MEM S3C_ADDR(0x00200000) system control (not used) | ||
24 | * S3C_VA_TIMER S3C_ADDR(0x00300000) timer block | ||
25 | * S3C_VA_WATCHDOG S3C_ADDR(0x00400000) watchdog | ||
26 | * S3C_VA_UART S3C_ADDR(0x01000000) UART | ||
27 | * | ||
28 | * S5PC100 specific virtual memory address can be defined here | ||
29 | * S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) GPIO | ||
30 | * | ||
31 | */ | ||
32 | |||
33 | #define S5PC100_PA_ONENAND_BUF (0xB0000000) | ||
34 | #define S5PC100_SZ_ONENAND_BUF (SZ_256M - SZ_32M) | ||
35 | |||
36 | /* Chip ID */ | ||
37 | |||
19 | #define S5PC100_PA_CHIPID (0xE0000000) | 38 | #define S5PC100_PA_CHIPID (0xE0000000) |
20 | #define S5P_PA_CHIPID S5PC100_PA_CHIPID | 39 | #define S5P_PA_CHIPID S5PC100_PA_CHIPID |
21 | 40 | ||
@@ -26,17 +45,26 @@ | |||
26 | #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) | 45 | #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) |
27 | 46 | ||
28 | #define S5PC100_PA_GPIO (0xE0300000) | 47 | #define S5PC100_PA_GPIO (0xE0300000) |
29 | #define S5P_PA_GPIO S5PC100_PA_GPIO | ||
30 | 48 | ||
31 | #define S5PC100_PA_VIC0 (0xE4000000) | 49 | #define S5PC1XX_PA_GPIO S5PC100_PA_GPIO |
32 | #define S5P_PA_VIC0 S5PC100_PA_VIC0 | 50 | #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) |
51 | |||
52 | /* Interrupt */ | ||
53 | #define S5PC100_PA_VIC (0xE4000000) | ||
54 | #define S5PC100_VA_VIC S3C_VA_IRQ | ||
55 | #define S5PC100_PA_VIC_OFFSET 0x100000 | ||
56 | #define S5PC100_VA_VIC_OFFSET 0x10000 | ||
57 | #define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) | ||
58 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) | ||
33 | 59 | ||
34 | #define S5PC100_PA_VIC1 (0xE4100000) | 60 | #define S5PC100_PA_ONENAND (0xE7100000) |
35 | #define S5P_PA_VIC1 S5PC100_PA_VIC1 | ||
36 | 61 | ||
37 | #define S5PC100_PA_VIC2 (0xE4200000) | 62 | /* DMA */ |
38 | #define S5P_PA_VIC2 S5PC100_PA_VIC2 | 63 | #define S5PC100_PA_MDMA (0xE8100000) |
64 | #define S5PC100_PA_PDMA0 (0xE9000000) | ||
65 | #define S5PC100_PA_PDMA1 (0xE9200000) | ||
39 | 66 | ||
67 | /* Timer */ | ||
40 | #define S5PC100_PA_TIMER (0xEA000000) | 68 | #define S5PC100_PA_TIMER (0xEA000000) |
41 | #define S5P_PA_TIMER S5PC100_PA_TIMER | 69 | #define S5P_PA_TIMER S5PC100_PA_TIMER |
42 | 70 | ||
@@ -83,8 +111,24 @@ | |||
83 | #define S3C_PA_IIC S5PC100_PA_IIC0 | 111 | #define S3C_PA_IIC S5PC100_PA_IIC0 |
84 | #define S3C_PA_IIC1 S5PC100_PA_IIC1 | 112 | #define S3C_PA_IIC1 S5PC100_PA_IIC1 |
85 | #define S3C_PA_FB S5PC100_PA_FB | 113 | #define S3C_PA_FB S5PC100_PA_FB |
86 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0) | 114 | #define S3C_PA_G2D S5PC100_PA_G2D |
87 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) | 115 | #define S3C_PA_G3D S5PC100_PA_G3D |
88 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) | 116 | #define S3C_PA_JPEG S5PC100_PA_JPEG |
89 | 117 | #define S3C_PA_ROTATOR S5PC100_PA_ROTATOR | |
90 | #endif /* __ASM_ARCH_MAP_H */ | 118 | #define S3C_VA_VIC0 (S3C_VA_IRQ + 0x0) |
119 | #define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) | ||
120 | #define S3C_VA_VIC2 (S3C_VA_IRQ + 0x20000) | ||
121 | #define S3C_PA_IIC S5PC100_PA_I2C | ||
122 | #define S3C_PA_IIC1 S5PC100_PA_I2C1 | ||
123 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG | ||
124 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY | ||
125 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC0 | ||
126 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC1 | ||
127 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC2 | ||
128 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD | ||
129 | #define S3C_PA_TSADC S5PC100_PA_TSADC | ||
130 | #define S3C_PA_ONENAND S5PC100_PA_ONENAND | ||
131 | #define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF | ||
132 | #define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF | ||
133 | |||
134 | #endif /* __ASM_ARCH_C100_MAP_H */ | ||