diff options
author | Byungho Min <bhminjames@gmail.com> | 2009-06-23 08:40:15 -0400 |
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committer | Ben Dooks <ben-linux@fluff.org> | 2009-08-16 18:24:58 -0400 |
commit | 8acd1ade2ede18408303c968e1449220c427a182 (patch) | |
tree | 598b77da0749b07868f2de84f210511707fe9f93 /arch/arm/mach-s5pc100/include/mach/entry-macro.S | |
parent | 433a915fc6456ee3a4b740fe4d92caa78164fdce (diff) |
ARM: S5PC100: CPU initialization
Signed-off-by: Byungho Min <bhmin@samsung.com>
[ben-linux@fluff.org: subject fixup]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s5pc100/include/mach/entry-macro.S')
-rw-r--r-- | arch/arm/mach-s5pc100/include/mach/entry-macro.S | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S new file mode 100644 index 000000000000..67131939e626 --- /dev/null +++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S | |||
@@ -0,0 +1,50 @@ | |||
1 | /* arch/arm/mach-s5pc100/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright 2009 Samsung Electronics Co. | ||
4 | * Byungho Min <bhmin@samsung.com> | ||
5 | * | ||
6 | * Based on mach-s3c6400/include/mach/entry-macro.S | ||
7 | * | ||
8 | * Low-level IRQ helper macros for the Samsung S5PC1XX series | ||
9 | * | ||
10 | * This file is licensed under the terms of the GNU General Public | ||
11 | * License version 2. This program is licensed "as is" without any | ||
12 | * warranty of any kind, whether express or implied. | ||
13 | */ | ||
14 | |||
15 | #include <asm/hardware/vic.h> | ||
16 | #include <mach/map.h> | ||
17 | #include <plat/irqs.h> | ||
18 | |||
19 | .macro disable_fiq | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_preamble, base, tmp | ||
23 | ldr \base, =S3C_VA_VIC0 | ||
24 | .endm | ||
25 | |||
26 | .macro arch_ret_to_user, tmp1, tmp2 | ||
27 | .endm | ||
28 | |||
29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
30 | |||
31 | @ check the vic0 | ||
32 | mov \irqnr, # S3C_IRQ_OFFSET + 31 | ||
33 | ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] | ||
34 | teq \irqstat, #0 | ||
35 | |||
36 | @ otherwise try vic1 | ||
37 | addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0) | ||
38 | addeq \irqnr, \irqnr, #32 | ||
39 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | ||
40 | teqeq \irqstat, #0 | ||
41 | |||
42 | @ otherwise try vic2 | ||
43 | addeq \tmp, \base, #(S3C_VA_VIC2 - S3C_VA_VIC0) | ||
44 | addeq \irqnr, \irqnr, #32 | ||
45 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | ||
46 | teqeq \irqstat, #0 | ||
47 | |||
48 | clzne \irqstat, \irqstat | ||
49 | subne \irqnr, \irqnr, \irqstat | ||
50 | .endm | ||