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authorPaul Mundt <lethal@linux-sh.org>2010-05-30 23:59:19 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-05-30 23:59:19 -0400
commit8fa76f7e61ef4e5bc97207143ea4e198b22487bc (patch)
tree266c42b6687e68e4febb72d8c031e5facd899a1c /arch/arm/mach-s5pc100/dma.c
parenta41a7b91772da2c77ac0da74285fd8ebd86a85ba (diff)
parent67a3e12b05e055c0415c556a315a3d3eb637e29e (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/arm/mach-s5pc100/dma.c')
-rw-r--r--arch/arm/mach-s5pc100/dma.c167
1 files changed, 167 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c
new file mode 100644
index 000000000000..0f5517571e2c
--- /dev/null
+++ b/arch/arm/mach-s5pc100/dma.c
@@ -0,0 +1,167 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <linux/platform_device.h>
21#include <linux/dma-mapping.h>
22
23#include <plat/devs.h>
24
25#include <mach/map.h>
26#include <mach/irqs.h>
27
28#include <plat/s3c-pl330-pdata.h>
29
30static u64 dma_dmamask = DMA_BIT_MASK(32);
31
32static struct resource s5pc100_pdma0_resource[] = {
33 [0] = {
34 .start = S5PC100_PA_PDMA0,
35 .end = S5PC100_PA_PDMA0 + SZ_4K,
36 .flags = IORESOURCE_MEM,
37 },
38 [1] = {
39 .start = IRQ_PDMA0,
40 .end = IRQ_PDMA0,
41 .flags = IORESOURCE_IRQ,
42 },
43};
44
45static struct s3c_pl330_platdata s5pc100_pdma0_pdata = {
46 .peri = {
47 [0] = DMACH_UART0_RX,
48 [1] = DMACH_UART0_TX,
49 [2] = DMACH_UART1_RX,
50 [3] = DMACH_UART1_TX,
51 [4] = DMACH_UART2_RX,
52 [5] = DMACH_UART2_TX,
53 [6] = DMACH_UART3_RX,
54 [7] = DMACH_UART3_TX,
55 [8] = DMACH_IRDA,
56 [9] = DMACH_I2S0_RX,
57 [10] = DMACH_I2S0_TX,
58 [11] = DMACH_I2S0S_TX,
59 [12] = DMACH_I2S1_RX,
60 [13] = DMACH_I2S1_TX,
61 [14] = DMACH_I2S2_RX,
62 [15] = DMACH_I2S2_TX,
63 [16] = DMACH_SPI0_RX,
64 [17] = DMACH_SPI0_TX,
65 [18] = DMACH_SPI1_RX,
66 [19] = DMACH_SPI1_TX,
67 [20] = DMACH_SPI2_RX,
68 [21] = DMACH_SPI2_TX,
69 [22] = DMACH_AC97_MICIN,
70 [23] = DMACH_AC97_PCMIN,
71 [24] = DMACH_AC97_PCMOUT,
72 [25] = DMACH_EXTERNAL,
73 [26] = DMACH_PWM,
74 [27] = DMACH_SPDIF,
75 [28] = DMACH_HSI_RX,
76 [29] = DMACH_HSI_TX,
77 [30] = DMACH_MAX,
78 [31] = DMACH_MAX,
79 },
80};
81
82static struct platform_device s5pc100_device_pdma0 = {
83 .name = "s3c-pl330",
84 .id = 1,
85 .num_resources = ARRAY_SIZE(s5pc100_pdma0_resource),
86 .resource = s5pc100_pdma0_resource,
87 .dev = {
88 .dma_mask = &dma_dmamask,
89 .coherent_dma_mask = DMA_BIT_MASK(32),
90 .platform_data = &s5pc100_pdma0_pdata,
91 },
92};
93
94static struct resource s5pc100_pdma1_resource[] = {
95 [0] = {
96 .start = S5PC100_PA_PDMA1,
97 .end = S5PC100_PA_PDMA1 + SZ_4K,
98 .flags = IORESOURCE_MEM,
99 },
100 [1] = {
101 .start = IRQ_PDMA1,
102 .end = IRQ_PDMA1,
103 .flags = IORESOURCE_IRQ,
104 },
105};
106
107static struct s3c_pl330_platdata s5pc100_pdma1_pdata = {
108 .peri = {
109 [0] = DMACH_UART0_RX,
110 [1] = DMACH_UART0_TX,
111 [2] = DMACH_UART1_RX,
112 [3] = DMACH_UART1_TX,
113 [4] = DMACH_UART2_RX,
114 [5] = DMACH_UART2_TX,
115 [6] = DMACH_UART3_RX,
116 [7] = DMACH_UART3_TX,
117 [8] = DMACH_IRDA,
118 [9] = DMACH_I2S0_RX,
119 [10] = DMACH_I2S0_TX,
120 [11] = DMACH_I2S0S_TX,
121 [12] = DMACH_I2S1_RX,
122 [13] = DMACH_I2S1_TX,
123 [14] = DMACH_I2S2_RX,
124 [15] = DMACH_I2S2_TX,
125 [16] = DMACH_SPI0_RX,
126 [17] = DMACH_SPI0_TX,
127 [18] = DMACH_SPI1_RX,
128 [19] = DMACH_SPI1_TX,
129 [20] = DMACH_SPI2_RX,
130 [21] = DMACH_SPI2_TX,
131 [22] = DMACH_PCM0_RX,
132 [23] = DMACH_PCM0_TX,
133 [24] = DMACH_PCM1_RX,
134 [25] = DMACH_PCM1_TX,
135 [26] = DMACH_MSM_REQ0,
136 [27] = DMACH_MSM_REQ1,
137 [28] = DMACH_MSM_REQ2,
138 [29] = DMACH_MSM_REQ3,
139 [30] = DMACH_MAX,
140 [31] = DMACH_MAX,
141 },
142};
143
144static struct platform_device s5pc100_device_pdma1 = {
145 .name = "s3c-pl330",
146 .id = 2,
147 .num_resources = ARRAY_SIZE(s5pc100_pdma1_resource),
148 .resource = s5pc100_pdma1_resource,
149 .dev = {
150 .dma_mask = &dma_dmamask,
151 .coherent_dma_mask = DMA_BIT_MASK(32),
152 .platform_data = &s5pc100_pdma1_pdata,
153 },
154};
155
156static struct platform_device *s5pc100_dmacs[] __initdata = {
157 &s5pc100_device_pdma0,
158 &s5pc100_device_pdma1,
159};
160
161static int __init s5pc100_dma_init(void)
162{
163 platform_add_devices(s5pc100_dmacs, ARRAY_SIZE(s5pc100_dmacs));
164
165 return 0;
166}
167arch_initcall(s5pc100_dma_init);