diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 19:39:23 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 19:39:23 -0500 |
commit | ab10f1dd914ad87e0370bd8b82f77dcd32b6d941 (patch) | |
tree | 3879eaf6d7ede69d2757a5db2bf0de5e6bd3c367 /arch/arm/mach-s5p64x0 | |
parent | f56d463423b825ff5bf4b63e0dc443557934165c (diff) | |
parent | 957c461e82f7a8ddcd7fb25c01c43917f64fde33 (diff) |
Merge branch 'dev/cleanup-clocks' into for-next
Diffstat (limited to 'arch/arm/mach-s5p64x0')
-rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6440.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6450.c | 16 |
2 files changed, 6 insertions, 26 deletions
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index 40137c6f0488..9f12c2ebf416 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c | |||
@@ -133,7 +133,7 @@ static struct clksrc_clk clk_pclk_low = { | |||
133 | * recommended to keep the following clocks disabled until the driver requests | 133 | * recommended to keep the following clocks disabled until the driver requests |
134 | * for enabling the clock. | 134 | * for enabling the clock. |
135 | */ | 135 | */ |
136 | static struct clk init_clocks_disable[] = { | 136 | static struct clk init_clocks_off[] = { |
137 | { | 137 | { |
138 | .name = "nand", | 138 | .name = "nand", |
139 | .id = -1, | 139 | .id = -1, |
@@ -602,8 +602,6 @@ static struct clk *clks[] __initdata = { | |||
602 | 602 | ||
603 | void __init s5p6440_register_clocks(void) | 603 | void __init s5p6440_register_clocks(void) |
604 | { | 604 | { |
605 | struct clk *clkp; | ||
606 | int ret; | ||
607 | int ptr; | 605 | int ptr; |
608 | 606 | ||
609 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | 607 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); |
@@ -614,16 +612,8 @@ void __init s5p6440_register_clocks(void) | |||
614 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 612 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
615 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 613 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
616 | 614 | ||
617 | clkp = init_clocks_disable; | 615 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
618 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 616 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
619 | |||
620 | ret = s3c24xx_register_clock(clkp); | ||
621 | if (ret < 0) { | ||
622 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
623 | clkp->name, ret); | ||
624 | } | ||
625 | (clkp->enable)(clkp, 0); | ||
626 | } | ||
627 | 617 | ||
628 | s3c_pwmclk_init(); | 618 | s3c_pwmclk_init(); |
629 | } | 619 | } |
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index 3f5ac93c455e..4eec457ddccc 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c | |||
@@ -181,7 +181,7 @@ static struct clksrc_clk clk_pclk_low = { | |||
181 | * recommended to keep the following clocks disabled until the driver requests | 181 | * recommended to keep the following clocks disabled until the driver requests |
182 | * for enabling the clock. | 182 | * for enabling the clock. |
183 | */ | 183 | */ |
184 | static struct clk init_clocks_disable[] = { | 184 | static struct clk init_clocks_off[] = { |
185 | { | 185 | { |
186 | .name = "usbhost", | 186 | .name = "usbhost", |
187 | .id = -1, | 187 | .id = -1, |
@@ -651,8 +651,6 @@ void __init_or_cpufreq s5p6450_setup_clocks(void) | |||
651 | 651 | ||
652 | void __init s5p6450_register_clocks(void) | 652 | void __init s5p6450_register_clocks(void) |
653 | { | 653 | { |
654 | struct clk *clkp; | ||
655 | int ret; | ||
656 | int ptr; | 654 | int ptr; |
657 | 655 | ||
658 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | 656 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) |
@@ -661,16 +659,8 @@ void __init s5p6450_register_clocks(void) | |||
661 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 659 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
662 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 660 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
663 | 661 | ||
664 | clkp = init_clocks_disable; | 662 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
665 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 663 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
666 | |||
667 | ret = s3c24xx_register_clock(clkp); | ||
668 | if (ret < 0) { | ||
669 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
670 | clkp->name, ret); | ||
671 | } | ||
672 | (clkp->enable)(clkp, 0); | ||
673 | } | ||
674 | 664 | ||
675 | s3c_pwmclk_init(); | 665 | s3c_pwmclk_init(); |
676 | } | 666 | } |