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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 23:25:36 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 23:25:36 -0400
commitf906fb1d70e016726fccfb0d978c5d425503db9d (patch)
treeb2bac5fbe7d2eb81dd7fe6cc88e27dddd0189c84 /arch/arm/mach-s5p64x0
parent510597e26e2a072e2d46ea5bc57feaf385e37f70 (diff)
parenta7fadac10ffbfd16cc7ccf951eab1ecf85e1abdf (diff)
Merge branch 'next/board' of git://git.linaro.org/people/arnd/arm-soc
* 'next/board' of git://git.linaro.org/people/arnd/arm-soc: (34 commits) ep93xx: add support Vision EP9307 SoM ARM: mxs: Add initial support for DENX MX28 ARM: EXYNOS4: Add support SMDK4412 Board ARM: EXYNOS4: Add MCT support for EXYNOS4412 ARM: EXYNOS4: Add functions for gic interrupt handling ARM: EXYNOS4: Add support clock for EXYNOS4412 ARM: EXYNOS4: Add support new EXYNOS4412 SoC ARM: EXYNOS4: Add support MCT PPI for EXYNOS4212 ARM: EXYNOS4: Add support PPI in external GIC ARM: EXYNOS4: convert boot_params to atag_offset ixp4xx: support omicron ixp425 based boards ARM: EXYNOS4: Add support SMDK4212 Board ARM: EXYNOS4: Add support PM for EXYNOS4212 ARM: EXYNOS4: Add support clock for EXYNOS4212 ARM: EXYNOS4: Add support new EXYNOS4212 SoC at91: USB-A9G20 C01 & C11 board support at91: merge board USB-A9260 and USB-A9263 together at91: add support for RSIs EWS board ARM: SAMSUNG: Fix mask value for S5P64X0 CPU IDs ARM: SAMSUNG: Fix mask for S3C64xx CPU IDs ...
Diffstat (limited to 'arch/arm/mach-s5p64x0')
-rw-r--r--arch/arm/mach-s5p64x0/dev-spi.c8
-rw-r--r--arch/arm/mach-s5p64x0/dma.c7
-rw-r--r--arch/arm/mach-s5p64x0/gpiolib.c7
-rw-r--r--arch/arm/mach-s5p64x0/irq-eint.c3
4 files changed, 9 insertions, 16 deletions
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
index ac825e826326..1fd9c79c7dbc 100644
--- a/arch/arm/mach-s5p64x0/dev-spi.c
+++ b/arch/arm/mach-s5p64x0/dev-spi.c
@@ -21,6 +21,7 @@
21#include <mach/regs-clock.h> 21#include <mach/regs-clock.h>
22#include <mach/spi-clocks.h> 22#include <mach/spi-clocks.h>
23 23
24#include <plat/cpu.h>
24#include <plat/s3c64xx-spi.h> 25#include <plat/s3c64xx-spi.h>
25#include <plat/gpio-cfg.h> 26#include <plat/gpio-cfg.h>
26 27
@@ -185,11 +186,8 @@ struct platform_device s5p64x0_device_spi1 = {
185 186
186void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) 187void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
187{ 188{
188 unsigned int id;
189 struct s3c64xx_spi_info *pd; 189 struct s3c64xx_spi_info *pd;
190 190
191 id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000;
192
193 /* Reject invalid configuration */ 191 /* Reject invalid configuration */
194 if (!num_cs || src_clk_nr < 0 192 if (!num_cs || src_clk_nr < 0
195 || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) { 193 || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) {
@@ -199,7 +197,7 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
199 197
200 switch (cntrlr) { 198 switch (cntrlr) {
201 case 0: 199 case 0:
202 if (id == 0x50000) 200 if (soc_is_s5p6450())
203 pd = &s5p6450_spi0_pdata; 201 pd = &s5p6450_spi0_pdata;
204 else 202 else
205 pd = &s5p6440_spi0_pdata; 203 pd = &s5p6440_spi0_pdata;
@@ -207,7 +205,7 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
207 s5p64x0_device_spi0.dev.platform_data = pd; 205 s5p64x0_device_spi0.dev.platform_data = pd;
208 break; 206 break;
209 case 1: 207 case 1:
210 if (id == 0x50000) 208 if (soc_is_s5p6450())
211 pd = &s5p6450_spi1_pdata; 209 pd = &s5p6450_spi1_pdata;
212 else 210 else
213 pd = &s5p6440_spi1_pdata; 211 pd = &s5p6440_spi1_pdata;
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c
index d7ad944b3475..0e5b3e63e5b3 100644
--- a/arch/arm/mach-s5p64x0/dma.c
+++ b/arch/arm/mach-s5p64x0/dma.c
@@ -28,6 +28,7 @@
28#include <mach/irqs.h> 28#include <mach/irqs.h>
29#include <mach/regs-clock.h> 29#include <mach/regs-clock.h>
30 30
31#include <plat/cpu.h>
31#include <plat/devs.h> 32#include <plat/devs.h>
32#include <plat/s3c-pl330-pdata.h> 33#include <plat/s3c-pl330-pdata.h>
33 34
@@ -133,11 +134,7 @@ static struct platform_device s5p64x0_device_pdma = {
133 134
134static int __init s5p64x0_dma_init(void) 135static int __init s5p64x0_dma_init(void)
135{ 136{
136 unsigned int id; 137 if (soc_is_s5p6450())
137
138 id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000;
139
140 if (id == 0x50000)
141 s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; 138 s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata;
142 else 139 else
143 s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; 140 s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata;
diff --git a/arch/arm/mach-s5p64x0/gpiolib.c b/arch/arm/mach-s5p64x0/gpiolib.c
index e7fb3b004e77..700dac6c43f3 100644
--- a/arch/arm/mach-s5p64x0/gpiolib.c
+++ b/arch/arm/mach-s5p64x0/gpiolib.c
@@ -19,6 +19,7 @@
19#include <mach/regs-gpio.h> 19#include <mach/regs-gpio.h>
20#include <mach/regs-clock.h> 20#include <mach/regs-clock.h>
21 21
22#include <plat/cpu.h>
22#include <plat/gpio-core.h> 23#include <plat/gpio-core.h>
23#include <plat/gpio-cfg.h> 24#include <plat/gpio-cfg.h>
24#include <plat/gpio-cfg-helpers.h> 25#include <plat/gpio-cfg-helpers.h>
@@ -473,14 +474,10 @@ static void __init s5p64x0_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip,
473 474
474static int __init s5p64x0_gpiolib_init(void) 475static int __init s5p64x0_gpiolib_init(void)
475{ 476{
476 unsigned int chipid;
477
478 chipid = __raw_readl(S5P64X0_SYS_ID);
479
480 s5p64x0_gpiolib_set_cfg(s5p64x0_gpio_cfgs, 477 s5p64x0_gpiolib_set_cfg(s5p64x0_gpio_cfgs,
481 ARRAY_SIZE(s5p64x0_gpio_cfgs)); 478 ARRAY_SIZE(s5p64x0_gpio_cfgs));
482 479
483 if ((chipid & 0xff000) == 0x50000) { 480 if (soc_is_s5p6450()) {
484 samsung_gpiolib_add_2bit_chips(s5p6450_gpio_2bit, 481 samsung_gpiolib_add_2bit_chips(s5p6450_gpio_2bit,
485 ARRAY_SIZE(s5p6450_gpio_2bit)); 482 ARRAY_SIZE(s5p6450_gpio_2bit));
486 483
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
index fe7380f5c3cd..494e1a8f6f6d 100644
--- a/arch/arm/mach-s5p64x0/irq-eint.c
+++ b/arch/arm/mach-s5p64x0/irq-eint.c
@@ -17,6 +17,7 @@
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <plat/cpu.h>
20#include <plat/regs-irqtype.h> 21#include <plat/regs-irqtype.h>
21#include <plat/gpio-cfg.h> 22#include <plat/gpio-cfg.h>
22 23
@@ -67,7 +68,7 @@ static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
67 __raw_writel(ctrl, S5P64X0_EINT0CON0); 68 __raw_writel(ctrl, S5P64X0_EINT0CON0);
68 69
69 /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */ 70 /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
70 if (0x50000 == (__raw_readl(S5P64X0_SYS_ID) & 0xFF000)) 71 if (soc_is_s5p6450())
71 s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2)); 72 s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
72 else 73 else
73 s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2)); 74 s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));