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authorStephane Eranian <eranian@google.com>2012-02-09 17:20:52 -0500
committerIngo Molnar <mingo@elte.hu>2012-03-05 08:55:39 -0500
commit225ce53910edc3c2322b1e4f2ed049a9196cd0b3 (patch)
treeadd1a7795fd5120d17cef078e1d457199e5e3608 /arch/arm/mach-s5p64x0
parentbce38cd53e5ddba9cb6d708c4ef3d04a4016ec7e (diff)
perf/x86: Add Intel LBR MSR definitions
This patch adds the LBR definitions for NHM/WSM/SNB and Core. It also adds the definitions for the architected LBR MSR: LBR_SELECT, LBRT_TOS. Signed-off-by: Stephane Eranian <eranian@google.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1328826068-11713-3-git-send-email-eranian@google.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mach-s5p64x0')
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