diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-01 02:46:36 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-22 22:49:32 -0400 |
commit | d5e8123bbb34f61c80c79fc7c2c2bc5336aa1166 (patch) | |
tree | 0b5e495c037761405ab4d95c67f80bce5b7a5f5e /arch/arm/mach-s5p64x0/setup-i2c0.c | |
parent | af94e5771a1f5eab3cb7c222c12ec116cb358f62 (diff) |
ARM: S5P64X0: 2nd Change to using s3c_gpio_cfgpin_range()
This patch changes the code setting ranges of GPIO pins in mach-s5p64x0 using
s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range().
NOTE: This is for missed things from the previous patch.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5p64x0/setup-i2c0.c')
-rw-r--r-- | arch/arm/mach-s5p64x0/setup-i2c0.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mach-s5p64x0/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c index dc4cc65a5019..75ef9e51b20a 100644 --- a/arch/arm/mach-s5p64x0/setup-i2c0.c +++ b/arch/arm/mach-s5p64x0/setup-i2c0.c | |||
@@ -25,17 +25,15 @@ struct platform_device; /* don't need the contents */ | |||
25 | 25 | ||
26 | void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) | 26 | void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) |
27 | { | 27 | { |
28 | s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2)); | 28 | s3c_gpio_cfgpin_range(S5P6440_GPB(5), 2, S3C_GPIO_SFN(2)); |
29 | s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP); | 29 | s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP); |
30 | s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2)); | ||
31 | s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP); | 30 | s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP); |
32 | } | 31 | } |
33 | 32 | ||
34 | void s5p6450_i2c0_cfg_gpio(struct platform_device *dev) | 33 | void s5p6450_i2c0_cfg_gpio(struct platform_device *dev) |
35 | { | 34 | { |
36 | s3c_gpio_cfgpin(S5P6450_GPB(5), S3C_GPIO_SFN(2)); | 35 | s3c_gpio_cfgpin_range(S5P6450_GPB(5), 2, S3C_GPIO_SFN(2)); |
37 | s3c_gpio_setpull(S5P6450_GPB(5), S3C_GPIO_PULL_UP); | 36 | s3c_gpio_setpull(S5P6450_GPB(5), S3C_GPIO_PULL_UP); |
38 | s3c_gpio_cfgpin(S5P6450_GPB(6), S3C_GPIO_SFN(2)); | ||
39 | s3c_gpio_setpull(S5P6450_GPB(6), S3C_GPIO_PULL_UP); | 37 | s3c_gpio_setpull(S5P6450_GPB(6), S3C_GPIO_PULL_UP); |
40 | } | 38 | } |
41 | 39 | ||