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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-05 21:18:05 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-05 21:18:05 -0400
commit7abec10c623d9e0416dab6919a0ea22e6283516b (patch)
tree83aa79c369e99c4fc60eea91ebd399b7689b312e /arch/arm/mach-s5p64x0/irq-pm.c
parent0de9adf284ec20454ecf37ffd98e7e98ba7292d6 (diff)
parentcfaf8fc5b59527281e9ddc2e0e04e1127936e17f (diff)
Merge branch 'next/cleanup3' of git://git.linaro.org/people/arnd/arm-soc
* 'next/cleanup3' of git://git.linaro.org/people/arnd/arm-soc: (79 commits) ARM: SAMSUNG: Move fimc plat. device from board files to plat-samsung ARM: SAMSUNG: Cleanup resources by using macro ARM: SAMSUNG: Cleanup plat-samsung/devs.c and devs.h ARM: S5P: To merge devs.c files to one devs.c ARM: S3C64XX: To merge devs.c files to one devs.c ARM: S3C24XX: To merge s3c24xx devs.c files to one devs.c ARM: S5P64X0: Add Power Management support ARM: S5P: Make the sleep code common for S5P series SoCs ARM: S5P: Make the common S5P PM code conditionally compile ARM: SAMSUNG: Move S5P header files to plat-samsung ARM: SAMSUNG: Move S3C24XX header files to plat-samsung ARM: SAMSUNG: Moving each SoC support header files ARM: SAMSUNG: Consolidate plat/pll.h ARM: SAMSUNG: Consolidate plat/pwm-clock.h ARM: SAMSUNG: Cleanup mach/clkdev.h ARM: SAMSUNG: remove sdhci default configuration setup platform helper ARM: EXYNOS4: Add FIMC device on SMDKV310 board ARM: EXYNOS4: Add header file protection macros ARM: EXYNOS4: Add usb ehci device to the SMDKV310 ARM: S3C2443: Add hsspi-clock from pclk and rename S3C2443 hsspi sclk ... Fix up conflicts in - arch/arm/mach-exynos4/{Kconfig,clock.c} ARM_CPU_SUSPEND, various random device tables (gah!) - drivers/gpio/Makefile sa1100 gpio added, samsung gpio drivers merged
Diffstat (limited to 'arch/arm/mach-s5p64x0/irq-pm.c')
-rw-r--r--arch/arm/mach-s5p64x0/irq-pm.c92
1 files changed, 92 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p64x0/irq-pm.c b/arch/arm/mach-s5p64x0/irq-pm.c
new file mode 100644
index 000000000000..3e6f2456ee9d
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/irq-pm.c
@@ -0,0 +1,92 @@
1/* linux/arch/arm/mach-s5p64x0/irq-pm.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - Interrupt handling Power Management
7 *
8 * Based on arch/arm/mach-s3c64xx/irq-pm.c by Ben Dooks
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/syscore_ops.h>
16#include <linux/serial_core.h>
17#include <linux/io.h>
18
19#include <plat/regs-serial.h>
20#include <plat/pm.h>
21
22#include <mach/regs-gpio.h>
23
24static struct sleep_save irq_save[] = {
25 SAVE_ITEM(S5P64X0_EINT0CON0),
26 SAVE_ITEM(S5P64X0_EINT0FLTCON0),
27 SAVE_ITEM(S5P64X0_EINT0FLTCON1),
28 SAVE_ITEM(S5P64X0_EINT0MASK),
29};
30
31static struct irq_grp_save {
32 u32 con;
33 u32 fltcon;
34 u32 mask;
35} eint_grp_save[4];
36
37static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS];
38
39static int s5p64x0_irq_pm_suspend(void)
40{
41 struct irq_grp_save *grp = eint_grp_save;
42 int i;
43
44 S3C_PMDBG("%s: suspending IRQs\n", __func__);
45
46 s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
47
48 for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
49 irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);
50
51 for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
52 grp->con = __raw_readl(S5P64X0_EINT12CON + (i * 4));
53 grp->mask = __raw_readl(S5P64X0_EINT12MASK + (i * 4));
54 grp->fltcon = __raw_readl(S5P64X0_EINT12FLTCON + (i * 4));
55 }
56
57 return 0;
58}
59
60static void s5p64x0_irq_pm_resume(void)
61{
62 struct irq_grp_save *grp = eint_grp_save;
63 int i;
64
65 S3C_PMDBG("%s: resuming IRQs\n", __func__);
66
67 s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
68
69 for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
70 __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
71
72 for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
73 __raw_writel(grp->con, S5P64X0_EINT12CON + (i * 4));
74 __raw_writel(grp->mask, S5P64X0_EINT12MASK + (i * 4));
75 __raw_writel(grp->fltcon, S5P64X0_EINT12FLTCON + (i * 4));
76 }
77
78 S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
79}
80
81static struct syscore_ops s5p64x0_irq_syscore_ops = {
82 .suspend = s5p64x0_irq_pm_suspend,
83 .resume = s5p64x0_irq_pm_resume,
84};
85
86static int __init s5p64x0_syscore_init(void)
87{
88 register_syscore_ops(&s5p64x0_irq_syscore_ops);
89
90 return 0;
91}
92core_initcall(s5p64x0_syscore_init);