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authorKukjin Kim <kgene.kim@samsung.com>2010-08-06 08:34:55 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-08-06 08:34:55 -0400
commitf2b7e3c54a304677a1142829fb5913595885379f (patch)
tree1eb941524c7325672f947dab525d96228b362e20 /arch/arm/mach-s5p6442
parent6b8eda04ffdc24b68d379a32358f4f09a425a380 (diff)
parent0fdb480e7fb1ecdd4076ddf8b6ab16b0d77406c1 (diff)
Merge branch 'next-s5p' into for-next
Conflicts: arch/arm/mach-s5pv210/mach-aquila.c arch/arm/mach-s5pv210/mach-goni.c
Diffstat (limited to 'arch/arm/mach-s5p6442')
-rw-r--r--arch/arm/mach-s5p6442/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-s5p6442/include/mach/system.h7
-rw-r--r--arch/arm/mach-s5p6442/mach-smdk6442.c24
3 files changed, 15 insertions, 18 deletions
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
index 02c23749c023..3fbc6c3ad2da 100644
--- a/arch/arm/mach-s5p6442/include/mach/irqs.h
+++ b/arch/arm/mach-s5p6442/include/mach/irqs.h
@@ -32,7 +32,7 @@
32#define IRQ_GPIOINT S5P_IRQ_VIC0(30) 32#define IRQ_GPIOINT S5P_IRQ_VIC0(30)
33 33
34/* VIC1 */ 34/* VIC1 */
35#define IRQ_nPMUIRQ S5P_IRQ_VIC1(0) 35#define IRQ_PMU S5P_IRQ_VIC1(0)
36#define IRQ_ONENAND S5P_IRQ_VIC1(7) 36#define IRQ_ONENAND S5P_IRQ_VIC1(7)
37#define IRQ_UART0 S5P_IRQ_VIC1(10) 37#define IRQ_UART0 S5P_IRQ_VIC1(10)
38#define IRQ_UART1 S5P_IRQ_VIC1(11) 38#define IRQ_UART1 S5P_IRQ_VIC1(11)
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h
index 8bcd8ed0c3c3..c30c1cc1b97e 100644
--- a/arch/arm/mach-s5p6442/include/mach/system.h
+++ b/arch/arm/mach-s5p6442/include/mach/system.h
@@ -13,12 +13,9 @@
13#ifndef __ASM_ARCH_SYSTEM_H 13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__ 14#define __ASM_ARCH_SYSTEM_H __FILE__
15 15
16static void arch_idle(void) 16#include <plat/system-reset.h>
17{
18 /* nothing here yet */
19}
20 17
21static void arch_reset(char mode, const char *cmd) 18static void arch_idle(void)
22{ 19{
23 /* nothing here yet */ 20 /* nothing here yet */
24} 21}
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
index 6e061bec6b74..8d8d04272f85 100644
--- a/arch/arm/mach-s5p6442/mach-smdk6442.c
+++ b/arch/arm/mach-s5p6442/mach-smdk6442.c
@@ -27,16 +27,16 @@
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28 28
29/* Following are default values for UCON, ULCON and UFCON UART registers */ 29/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5P6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 30#define SMDK6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \ 31 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \ 32 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \ 33 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \ 34 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN) 35 S3C2443_UCON_RXERR_IRQEN)
36 36
37#define S5P6442_ULCON_DEFAULT S3C2410_LCON_CS8 37#define SMDK6442_ULCON_DEFAULT S3C2410_LCON_CS8
38 38
39#define S5P6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ 39#define SMDK6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
40 S5PV210_UFCON_TXTRIG4 | \ 40 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4) 41 S5PV210_UFCON_RXTRIG4)
42 42
@@ -44,23 +44,23 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
44 [0] = { 44 [0] = {
45 .hwport = 0, 45 .hwport = 0,
46 .flags = 0, 46 .flags = 0,
47 .ucon = S5P6442_UCON_DEFAULT, 47 .ucon = SMDK6442_UCON_DEFAULT,
48 .ulcon = S5P6442_ULCON_DEFAULT, 48 .ulcon = SMDK6442_ULCON_DEFAULT,
49 .ufcon = S5P6442_UFCON_DEFAULT, 49 .ufcon = SMDK6442_UFCON_DEFAULT,
50 }, 50 },
51 [1] = { 51 [1] = {
52 .hwport = 1, 52 .hwport = 1,
53 .flags = 0, 53 .flags = 0,
54 .ucon = S5P6442_UCON_DEFAULT, 54 .ucon = SMDK6442_UCON_DEFAULT,
55 .ulcon = S5P6442_ULCON_DEFAULT, 55 .ulcon = SMDK6442_ULCON_DEFAULT,
56 .ufcon = S5P6442_UFCON_DEFAULT, 56 .ufcon = SMDK6442_UFCON_DEFAULT,
57 }, 57 },
58 [2] = { 58 [2] = {
59 .hwport = 2, 59 .hwport = 2,
60 .flags = 0, 60 .flags = 0,
61 .ucon = S5P6442_UCON_DEFAULT, 61 .ucon = SMDK6442_UCON_DEFAULT,
62 .ulcon = S5P6442_ULCON_DEFAULT, 62 .ulcon = SMDK6442_ULCON_DEFAULT,
63 .ufcon = S5P6442_UFCON_DEFAULT, 63 .ufcon = SMDK6442_UFCON_DEFAULT,
64 }, 64 },
65}; 65};
66 66