diff options
| author | Kukjin Kim <kgene.kim@samsung.com> | 2010-07-20 20:19:51 -0400 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-08-05 05:30:21 -0400 |
| commit | c8def0857f93413db795ce3586bcc3c3eaae7088 (patch) | |
| tree | c1fce262d95ea73924f97379e035f080de680493 /arch/arm/mach-s5p6442/mach-smdk6442.c | |
| parent | 02a0456b3b6ad7503a37fab6f00a27d2bd53d483 (diff) | |
ARM: S5P: Changes the definition name of default UART registers
This patch changes the definition name of default UCON, ULCON, and
UFCON UART registers from ARCH(SoC) to Machine(Board). Because it
depends on machine.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5p6442/mach-smdk6442.c')
| -rw-r--r-- | arch/arm/mach-s5p6442/mach-smdk6442.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c index ebcf99777259..6107bd8b47c2 100644 --- a/arch/arm/mach-s5p6442/mach-smdk6442.c +++ b/arch/arm/mach-s5p6442/mach-smdk6442.c | |||
| @@ -27,16 +27,16 @@ | |||
| 27 | #include <plat/cpu.h> | 27 | #include <plat/cpu.h> |
| 28 | 28 | ||
| 29 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 29 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
| 30 | #define S5P6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 30 | #define SMDK6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
| 31 | S3C2410_UCON_RXILEVEL | \ | 31 | S3C2410_UCON_RXILEVEL | \ |
| 32 | S3C2410_UCON_TXIRQMODE | \ | 32 | S3C2410_UCON_TXIRQMODE | \ |
| 33 | S3C2410_UCON_RXIRQMODE | \ | 33 | S3C2410_UCON_RXIRQMODE | \ |
| 34 | S3C2410_UCON_RXFIFO_TOI | \ | 34 | S3C2410_UCON_RXFIFO_TOI | \ |
| 35 | S3C2443_UCON_RXERR_IRQEN) | 35 | S3C2443_UCON_RXERR_IRQEN) |
| 36 | 36 | ||
| 37 | #define S5P6442_ULCON_DEFAULT S3C2410_LCON_CS8 | 37 | #define SMDK6442_ULCON_DEFAULT S3C2410_LCON_CS8 |
| 38 | 38 | ||
| 39 | #define S5P6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | 39 | #define SMDK6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
| 40 | S5PV210_UFCON_TXTRIG4 | \ | 40 | S5PV210_UFCON_TXTRIG4 | \ |
| 41 | S5PV210_UFCON_RXTRIG4) | 41 | S5PV210_UFCON_RXTRIG4) |
| 42 | 42 | ||
| @@ -44,23 +44,23 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = { | |||
| 44 | [0] = { | 44 | [0] = { |
| 45 | .hwport = 0, | 45 | .hwport = 0, |
| 46 | .flags = 0, | 46 | .flags = 0, |
| 47 | .ucon = S5P6442_UCON_DEFAULT, | 47 | .ucon = SMDK6442_UCON_DEFAULT, |
| 48 | .ulcon = S5P6442_ULCON_DEFAULT, | 48 | .ulcon = SMDK6442_ULCON_DEFAULT, |
| 49 | .ufcon = S5P6442_UFCON_DEFAULT, | 49 | .ufcon = SMDK6442_UFCON_DEFAULT, |
| 50 | }, | 50 | }, |
| 51 | [1] = { | 51 | [1] = { |
| 52 | .hwport = 1, | 52 | .hwport = 1, |
| 53 | .flags = 0, | 53 | .flags = 0, |
| 54 | .ucon = S5P6442_UCON_DEFAULT, | 54 | .ucon = SMDK6442_UCON_DEFAULT, |
| 55 | .ulcon = S5P6442_ULCON_DEFAULT, | 55 | .ulcon = SMDK6442_ULCON_DEFAULT, |
| 56 | .ufcon = S5P6442_UFCON_DEFAULT, | 56 | .ufcon = SMDK6442_UFCON_DEFAULT, |
| 57 | }, | 57 | }, |
| 58 | [2] = { | 58 | [2] = { |
| 59 | .hwport = 2, | 59 | .hwport = 2, |
| 60 | .flags = 0, | 60 | .flags = 0, |
| 61 | .ucon = S5P6442_UCON_DEFAULT, | 61 | .ucon = SMDK6442_UCON_DEFAULT, |
| 62 | .ulcon = S5P6442_ULCON_DEFAULT, | 62 | .ulcon = SMDK6442_ULCON_DEFAULT, |
| 63 | .ufcon = S5P6442_UFCON_DEFAULT, | 63 | .ufcon = SMDK6442_UFCON_DEFAULT, |
| 64 | }, | 64 | }, |
| 65 | }; | 65 | }; |
| 66 | 66 | ||